re:Debugging error in VHDL

Without seeing the actual code affected, here are the likel problems

> HDLParsers:3324 - IN mode Formal enable of add8bit_wc wit > no default value must be associated with an actual value >

You're have no signal connected to th

add8bit_wc input port

> HDLParsers:162 - Read symbol PORT, expecting ';' >

You're probably missing a [b:3ce96a8410];[/b:3ce96a8410] in you

code

If these still don't work, post the code and you'll get a mor

specific answer

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