Re: Cyclone vs Spartan-3

Reply to
Peter Alfke
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Willste nen S3-50 haben? Die liegen hier in meiner Schublade...

> Darmstadt ist ja nicht so sehr "out in the wild" > Gruss > Peter > ====================== > Uwe B> > > > DK wrote: > > : Hi, All > > > > : for the new multichannel filter design I have a choice - > > : Altera Cyclone EP1C12 ($60) or Xilinx Spartan-3 XC3S1000(???) > > > > : Xilinx part has a embedded MAC units. > > > > : I've used in a past Altera chips and they have a good tech support and

free

> : tools. > > > > : Does any one has experience with Xilinx support? And is it possible to > > : obtain a free tools from Xilinx or they charge for the software? > > > > : Any other hidden issues? > > > > Don't expect the Spartan III out in the wild any soon... > > > > Bye > > -- > > Uwe Bonnes snipped-for-privacy@elektron.ikp.physik.tu-darmstadt.de > > > > Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt > > --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Hab auch ein paar S3-50 in der Schublade... Weiss aber immer noch nicht ob die Blockrams und DLL's haben oder nicht ?

Gruss MIKE

for our english readers: I also have some spartan3-50 devices, but don't know if they have blockrams and dll's ?

regards MIKE

Reply to
Mike Randelzhofer

: Hab auch ein paar S3-50 in der Schublade... : Weiss aber immer noch nicht ob die Blockrams und DLL's haben oder nicht ?

: Gruss MIKE

: for our english readers: : I also have some spartan3-50 devices, but don't know if they have blockrams : and dll's ?

To my knowledge, the first batch of 3S50 was made without BRAM and DLLs. Try to decipher the Date Code and you probably you'll find information on the Xilinx webpage ( and you probably will get feedback here).

Bye

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Reply to
Uwe Bonnes

"Peter Alfke" schrieb im Newsbeitrag news: snipped-for-privacy@xilinx.com...

OK, but i didn't know that this NG is called "FPGAinformationexchangecentraldistributioncenter".

So the present s3-50 devices without blockrams are the fastest s3 90nm chips forever ?

MIKE

Reply to
M.Randelzhofer

No, when I wrote "speed up", I meant weeks in design, not picoseconds in operation. Spartan3 is not the fastest, in some areas it is slower than Virtex-II, since the priorities for Spartan3 were: 1. low cost, 2. low cost, and 3. low cost. We don't throw away speed, but we did not increase the chip size to gain performance. Deleting BRAM and DLL does nothing to the performance, but it reduced the design effort, and it made the chip smaller. But this is all history now.

"FPGAinformationsaustauschzentralverteilungsstelle" was meant as a joke, referring to the American fascination with the German capability to concatenate words ad infinitum. Donaudampfschifffartgesellschaftskapitaen....

Peter Alfke

Peter Alfke

Reply to
Peter Alfke

Personally, I agree with your statement and have been trying to convince the powers that be to add additional Spartan-3 devices to WebPack. The folks responsible for WebPack are concerned about the total download size. The larger devices have multi-MB support files.

Hmm. Engineering samples of the XC3S1000 and XC3S50 are available today. The engineering samples have the part number XC3S1000J and XC3S50J to distinguish them from the production devices. This may be the reason you were quoted longer delivery. The non-'J' devices are due out in 4Q2003. The non-'J' version of the XC3S50 also includes block RAM, embedded multipliers, and 2 Digital Clock Managers (DCMs), which the XC3S50J does not.

--
---------------------------------
Steven K. Knapp
Applications Manager, Xilinx Inc.
General Products Division
Spartan-3/II/IIE FPGAs
http://www.xilinx.com/xlnx/xil_prodcat_landingpage.jsp?title=Spartan-3
Tel:  (408) 626-7447
E-mail: steve.knapp@xilinx.com
---------------------------------
Reply to
Steven K. Knapp

You could always shock them with the 'left field' concept of selective downloading just the device library files you need ? :)

-jg

Reply to
Jim Granville

If the size of the download is the issue, there are very simple ways to address that. One is to split the download into two parts, one for the current configuration and one for the added support for the larger devices. The other is just to ship the CD as you already do. I don't think adding all the chips will blow away a CD will it? As it is, I don't think it is very practical to ask a user to download a 150 MB file. At least it is not practical for me to download it.

I have been told that the 50 and 1000 have a design problem with 3 volt tolerance and have been pushed back from late Q3 or early Q4 to 1Q04. The other two or three chips due out in Q4 (including the XC3S400) are now the first chips to be available in full production.

I am having a lot of trouble getting straight information and this is what I currently have in print! If this is not correct, I really need to know now!

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX
Reply to
rickman

the

folks

The

There's little doubt that multiple optional download parts is the most elegant solution - along with the possiblity of getting everything on CD for those that want that. However, the current WebPack is so large that a few extra megabytes for extra part support would not make a significant difference. And anyway, are there many companies with the resources to be involved in fpga design, but without a permanent internet connection? Even if it's a bit slow, you can always leave a download running overnight.

Reply to
David Brown

While you're adding things, any chance of sneaking the real differential input terminators ( LVDS_25_DT, LDT_25_DT, etc. ) of the V2Pro into the S3 ?

Brian

P.S. And I'd personally love to see some TBUF's - Xilinx seems to have forgotten that not only did they provide (the illusion of) tristate buffers, but also dedicated chip-spanning routing for wide multi-source buses without tying up routing resources.

Although their demise was not unexpected, given that they'd already been chopped off at the knees in V2 by providing TBUF's at a vertical pitch that didn't match the carry chain pitch.

For V3(??), how about a full set of TBUFs every N columns, instead of a half set in every column?

Reply to
Brian Davis

Overnight does not cut it. As for the resources, it really does not take a lot and a high speed internet connection is not even on the list other than for this sort of download. These files are so large that the reliability of the connection becomes a significant factor. The last time I actually downloaded webpack, it took me about five trys and over a week.

I know there are tools that let you restart an interrupted download, but even then it is a real chore getting a download completed. I much prefer to buy the CD.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX
Reply to
rickman

Split the download, or switch the devcie files to be download-on-demand or download-via-miniapp.

--
Nicholas C. Weaver                                 nweaver@cs.berkeley.edu
Reply to
Nicholas C. Weaver

Actually the device files should be separate anyway since they change frequently. There are often reasons for not wanting to change the version of the tools you are using, but there is never a reason to keep an out of date speed file.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX
Reply to
rickman

Hi Dennis,

Here are a few key advantages for Cyclone that I can think of off the top of my head:

- Availability. The 1C12 is in full production on a 130 um process that we've used to manufacture 10+ different devices (including 7 Stratix members, 4 Cyclone members, and some Apex II members)

- Performance. The _slowest_ Cyclone speed grade is 20% faster (geometric average of fmax over many real user designs) than Spartan-3, which is currently offered in only one speed-grade. If you need greater performance, there are two more Cyclone speed grades available, giving you an additional

30% performance advantage.

- 3.3V Tolerance. Cyclone is 3.3V tolerant, in today's silicon. PCI? No problem.

- Bitstream Compression. Regardless of your data source, you can compress your bitstream (~2:1 ratio) to reduce the cost of your non-volatile storage device, whether that is our low-cost, low-footprint serial configuration devices or something else.

Regards,

Paul Leventis Altera Corp.

Reply to
Paul Leventis

I don't know about my line being "dodgy". I just know that the combination of ISP, phone line, modem, OS and browser software makes it hard to get a 17 hour download to complete without error. It is also a PITA tying up the modem connection for a day while this is going on. It makes it very slow to browse or even get emails.

As to the effort required to get a solid data line, there is virtually

*nothing* you can do if your voice capability is not affected. I have talked to the phone company before and they have made it clear that a phone line is not a data line. They guarantee no specific data rate. DSL is not available in the second largest city in Maryland and Cable Modem is a fixed installation, it can not be easily moved from one computer to another. Cable Modem also goes out in nearly every storm along with the TV.

I only wish I could get connected at 57 kbps!

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX
Reply to
rickman

Marc,

If you learn nothing else about dealing with IC vendors it should be that you never, ever, EVER listen to what one vendor says about another. Feel free to check it out yourself, but you should always assume that any vendor will put his competition in the worst possible light, perhaps even unfairly.

So don't blame a vendor for being a vendor. They all do it. Just learn to be a discriminating listener. Kinda like when you watch commercials on TV. :)

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX
Reply to
rickman

of

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main

hard or

requirement

the

line,

Can't you use a firewall/router connected to a cable modem? Of course, it won't fix the storm problem, and not every isp's contract will let you connect a whole network to their system. Can you get ISDN there? I have no real idea whether that is available in the US or not - it is popular in Europe for businesses, and used to be common for internet access before ADSL became so widespread. Maybe you can get radio internet connections? Many of these are pretty ropey, but there are some ISP's here in Norway that manage to do it well, so it's certainly possible. Other than that, I can offer nothing but sympathy (and surprise - I knew the US had a problematic telephone system, but I didn't know it was that bad).

Reply to
David Brown

Reply to
Peter Alfke

Hi Marc,

Interesting... I thought my posting was relatively FUD free. Have I have been on the dark side for too long? :-)

I am a tech person... I assure you that we're the last customer of ISE that Xilinx cares to inform about future performance!

The software is the silicon -- it doesn't matter how fast the chip is if you don't know how fast your design will run on it. I would be leary of relying on a nebulous future performance improvement; I think the performance reported *today* is very relevant for people making decisions today. Besides, in postings to this newsgroup at least, Xilinx has indicated that they sacked performance in order to reduce costs. So how conservative is the timing? 5%? 10%? 100%? I don't know. Do you?

Hmm... I'd go listen to some Xilinx conference calls from the same time period, and look at recent dielectric decisions on VIIPro, and look at when products shipped vs. dates indicated in announcements before proclaiming that FUD.

being

I guess it's not that fair for me to compare a released, available, fully characterized product with a final timing model against a product that is barely sampling. But that is what the original poster was asking for, and that's all I can compare against. And the "nebulous" claim was 20% faster (slowest Cyclone to only Spartan 3 speed grade), or ~55% for the fastest Cyclone speed grade. These are not "up to" numbers -- they are geometric averages over 50+ user designs.

Have yourself a great long weekend,

Paul Leventis Altera Corp.

Reply to
Paul Leventis

"DK" wrote in news:3eff173f$1_3@newsfeed:

$60? What speed grade are you using?

Also, is this low quantity pricing (~ Xilinx part has a embedded MAC units.

Reply to
Ed Henciak

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