The bus macro doesn't seem to lack anything, but I discovered that if I route the concerned signal to a "pip" further to the left, the design finally routes. So it seems that the PAR needs to have that first part of the path to route the signal.
Another question, are the bus macro really compulsory? If I use a custom bus macro, without TBUFs, just to be sure that the signal passes through the same nets, will it work?
Your help was very useful.
Regards, Amaury Anciaux
Try the following at the command prompt:
xdl -ncd2xdl bm_v2p_4b.nmc
This converts the bus macro to an XDL-description. Have a look at the .XDL-file this generates. For each net, there should be a section where it specifies which PIPs to use and such. For each net there should be an attribute like this:
cfg "_NET_PROP::IS_BUS_MACRO:" ,
If there isn't, par sometimes doesn't route the corresponding output net. I have no idea why that is... In case this attribute is not set for the fourth bit of your bus macro, it could help to insert it manually in the .XDL-file and convert that back to ncd-format:
xdl -xdl2ncd bm_v2p_4b.xdl
This gives you an .ncd-file which you have to rename to .nmc to be able to use it as a macro.
Don't know if this will help you, but I always had to manually insert the above attribute for all nets in the macros I did myself in FPGA Editor. FPGA Editor always seems to "forget" that, for whatever reason.
BTW, I'm not sure if all of this works satisfactory with ISE6.1/6.2... When using XDL in ISE6, I always get a warning that "this is a new revision ncd, some features might be lost" or something.
"1" disables the tristate buffer, so "1" for high impedance.