Questions about guard bits in CORDIC algorithm

Hi, I have learned about CORDIC from this group, especially from Ray. Now, I have several more questions. One paper described the implement structure of CORDIC algorithm. It uses 16 bits data width and 6 guard bits internally. What is the guard bits? I have borrowed several digital design books from library and they do not mention that. Even though I can guess guard bits are used for overflow prevention, it is far away from understanding the utilization of its application in the CORDIC algorithm. My another question is how to realize an MAC(multiply-and-accumulate) and DAC(divide-and-accumulate) using CORDIC. The paper says they can. Although I have read the relevant papers on the website of Ray, I have not got the answer. Could you shed some light on this question?

Thans in advance

Reply to
Jeff
Loading thread data ...

Me, too. ;-)

Think of it this way: if you take 16 steps of CORDIC shift/conditional add, each one of those adds round-off error. If the computation is done with

16-bit precision, each one adds about one bit of round-off error, and the error from 16 stages are uncorrelated, the net (rms) error for the full computation is sqrt(16)*1 bit is 4 bits. So your "16-bit" CORDIC really only produces an answer that is 12-bit accurate.

I have CORDIC implemented in Verilog, and my test bench measures the peak and rms error of the computation for a few thousand input vectors. My data path is 16 bits, the input angle is 18 bits, and my actual test bench output is

test covers 8205 points, full scale is 26980 bits peak error 8.68 bits, 0.032 % rms error 2.09 bits, 0.008 % PASS

I don't see any relation between MAC/DAC and CORDIC. Can you quote the relevant section of the paper? Maybe you misread it.

- Larry

Reply to
Larry Doolittle

Thank you very much. The paper reads: In addition to the CORDIC vectoring and rotation modes, Tab. 2 also shows how to elegantly implement the MAC and DAC (divide-and-accumulate) operations using CORDIC arithmetic:

MAC: yout=yout'+xin*yin, DAC: xout=xout'+xin/yin

At first, I have the same doubt. But it states clearly.

Reply to
Jeff

I think of guard bits as extra MSBs to prevent overflow. With CORDIC, worst case you need 2 to accommodate the gain (1.65) plus rotation of the worst case vector on (45 degree line, full scale I and Q) to a cardinal axis, which gives a 'gain' of sqrt(2) on one axis. CORDIC also suffers from some truncation errors at each iteration due to the right shift of the cross components. If you simply truncate at each iteration, the worst case error is roughly log2(iterations) bits, which tells you the number of bits extra you should keep in the LSBs to minimize the trucation error at the output.

I'm not aware of a multiply-accumulate or divide-accumulate directly, however the CORDIC can be modified to do multiplicati> Hi,

--

--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.

401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com
formatting link

"They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759

Reply to
Ray Andraka

Thank you very much, Ray. As what you say, I eventurely find that the auther realized multiply and divide using CORDIC, then add the results from the paper.

Reply to
Jeff

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.