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Question regarding FPGA startup ROMs

Hi,

I've been working with Xilinx CPLDs (mostly 95108) for quite some time now, and as my designs became more complex, the CPLDs became too small for me. Due to a research paper assignment, I've been working with a Spartan3 development board since July and I'm considering using Spartans for my home-made designs. The one problem is that the development board I've worked with so far has no startup ROM, so I have to re-program the FPGA after every power-up. I couldn't find any guides on that topic on the net - could someone please give me a few hints on how to implement a startup ROM (like sample circuits or chip types)?

Thanks in advance, Immo Birnbaum

Reply to
Immo Birnbaum
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It's all in the Xilinx documents for the Spartan chips. You can connect their own SPROM with a couple pull-up resistors and grounds on the M(x) config pins, and it takes it from there. I haven't used Spartan 3, but have done a lot with 5 V Spartan chips.

I've been looking at how to use other maker's SPROMs that are a lot cheaper than Xilinx's SPROMS for the Spartan 2. One problem is some other maker's SPROMs are slower than the config clock provided by the Spartan 2.

Jon

Reply to
Jon Elson

use Xilinx platform flash proms. They can be prograammed by the impact SW.

See

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Another option is to wait for Spartan 3E chips to become availlable. Then you can use normal SPI flash proms from Atmel,SSt,ST or others. They are cheap, e.g a M25P80 with 8Mbits from ST is about 2,5-4$

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Try yourself at

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I don't know if these SPI flashes are supported by xilinx impact. However, IMHO the Lattice tools should do that.

MIKE

Reply to
M.Randelzhofer

The easiest way to do this is to use a Platform flash device such as the XCF01. They connect to the JTAG scan chain, so you will be able to program the bitstream via impact with the Xilinx download cable (such as the Parrallel cable IV). Upon system power-up, they will load a bitstream into the Spartan chip and will make your system stand-alone.

Goto the Xilinx Homepage and click on configuration solutions to get more info. Don't use any of the older PROMs or try to hack your own configuration solution with an external microprocessor. For what you are doing, these devices are perfect. Just make the right connections to the FPGA and your done.

The only downside is that it seems that all Xilinx chips are in short supply. I know Avnet is a distributor but it seemed like they didn't have any stock (lead time of 6weeks).

-Eli

Immo Birnbaum wrote:

Reply to
Eli Hughes

The model I've seen is to have a small CPLD connected to a standard flash memory (the board in front of me has a 9536 CPLD and an E28F320 Intel flash device); the CPLD is connected to the flash, the FPGA and a parallel-port cable, and can either program the flash from the parallel port, or program the FPGA from the flash. I _think_ the address and data buses from the flash are also connected to the FPGA.

That seems a nice way to do it: the machine can't get into an unprogrammable state, it's very off-the-shelf components.

Tom

Reply to
Thomas Womack

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