Hi, Now, I learn xflow of xilinx. I want to generate a function simulation output file. For the example vhdl file: watchvhd, according to the Development System Reference Guid, I use the command:
xflow -p xc2vp2-7fg256 -fsim modelsim_vhdl.opt stopwatch
It generates a file: func_sim.vhdl
My question is: How can I use it in Modelsim? Thanks in advance