Hi all,
We are trying to implement QAM 64 modulation on a 1Gbps signal to fit in a
200MHz bandwidth using FPGA's. We are currently looking at using an FPGA to split the 1Gbps stream in two streams of 0.5Gbps using Serial-Parallel, and using another set of 2 Serial-Parallels to split the each of the 2 streams into 3 portions each. The three signals can then be fed into a 3 bit DAC (implemented within the FPGA) to receive an output signal from the FPGA.We are currently looking at buying the Altera UP3 education boards, or some inexpensive evaluation boards that can be used to implement this functionality. Can you make any recomendations on some boards for this application.
Are there any tutorials for FPGA newbies that you know of, and specifically I need help with implementing the Serial-Parallel and the 3 bit DAC. I am also open to other suggestions/approaches, but we are hoping to keep this thing as simple as possible.
Thanks in advance, Kaalia