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Programming a Digilent S6 Carrier (Spartan 6

Hi,

I'm programming the Flash memory in a Digilent "S6 carrier" board. It takes a long time, about 8 minutes.

The configuration file size is 1484404 bytes and I'd expect it to take around 10s at a cable clock frequency of 1.6 Mbit/s. Not 467s.

Under "edit attached flash properties" there is an option "Data width: 1". What does this mean? If I set it to the maximum of 4, I get a warning

> "The data width you assigned is 4 but the PROM file (.mcs) is generated

in a x1 mode. Please double-check your assignments or it may not work properly."

but I don't see any options when the .mcs file is created to change that. The Flash memory is N25Q128, and the electrical connections can be found here, top of page 5:

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What does this option mean?

A log from an upload is pasted below. I've tried to create the .mcs file for smaller memory (16M instead of 128M) but it seems to make no difference.

Is there anything I can do to speed this up? With my favourite "Papilio Pro board", reflashing takes about 10 s (the bitstream is 1/6 the size, but still...) Verify is off.

Direct upload to the FPGA is of course an option, but it's one thing less to worry if I can take the board off the shelf after a week and simply plug it in.

Cheers

Markus

INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.3 INFO:iMPACT - Digilent Plugin: Opening device : "SN:xxx". INFO:iMPACT - Digilent Plugin: User Name: FMC-Carrier-S6 INFO:iMPACT - Digilent Plugin: Product Name: FMC Carrier-S6 INFO:iMPACT - Digilent Plugin: Serial Number: xxx INFO:iMPACT - Digilent Plugin: Product ID: 00F0000D INFO:iMPACT - Digilent Plugin: Firmware Version: 0306 INFO:iMPACT - Digilent Plugin: JTAG Port Number: 0 INFO:iMPACT - Digilent Plugin: JTAG Clock Frequency: 1600000 Hz INFO:iMPACT - Current time: 29.01.2014 15:17:36 PROGRESS_START - Starting Operation. Maximum TCK operating frequency for this device chain: 0. Validating chain... Boundary-scan chain validated successfully. '1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations. INFO:iMPACT - Downloading core file C:/Xilinx/14.7/ISE_DS/ISE/spartan6/data/xc6slx45_spi.cor. '1': Downloading core... LCK_cycle = NoWait. LCK cycle: NoWait done. '1': Reading status register contents... INFO:iMPACT:2219 - Status register values: INFO:iMPACT - 0011 1100 1110 1100 INFO:iMPACT:2492 - '1': Completed downloading core to device. '1': IDCODE is '20ba18' (in hex). '1': ID Check passed. '1': IDCODE is '20ba18' (in hex). '1': ID Check passed. '1': Erasing Device. '1': Using Sector Erase. '1': Programming Flash. '1':Programming in x1 mode. '1': Programmed successfully. INFO:iMPACT - '1': Flash was programmed successfully. LCK_cycle = NoWait. LCK cycle: NoWait INFO:iMPACT - '1': Checking done pin....done. '1': Programmed successfully. PROGRESS_END - End Operation.

************** Elapsed time = 466 sec. *****************

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Reply to
mnentwig
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Unfortunately there's a lot of overhead in programming the SPI flash, so the cable bit rate is not the bitstream data rate. 8 minutes may be about right. Depending on the cable, you might up the bit rate to 12 MHz (requires a USB 2.0 HS slot). I've found that many BIOSes default to setting the USB 2.0 ports to standard speed or "fast" rather than high-speed. You'd need to open the BIOS setup to see if that's a problem on your computer.

This is the way the SPI flash is read. Most modern SPI flash chips support dual or quad readout mode (x2 or x4). This makes the time to configure the FGPA from flash go down by half or quarter from the standard SPI serial (x1) time. However the bitstream must match the data width of the PROM file. To use x4 mode, you need to have an appropriate SPI device that supports it, e.g. Winbond W25Qxxx. Then you have to go back to ISE and set the bit width to 4 when you generate the bitstream (note - this is not done from Impact). Finally when you generate the .mcs file, you need to select the x4 mode.

In any case this only reduces the startup time of the FPGA. It has no effect on the time to program the Flash. Programming is always done 1-bit serially.

--
Gabor
Reply to
GaborSzakacs

Hi Gabor,

thanks for the explanation. I'll try a different USB port tomorrow, didn't think of that. I may have plugged it into a mouse-/keyboard port, not the USB 3.0 socket. I was also wondering about the startup time, not that it's a problem in my application. About 5 secs, seemed rather slow. Might give it a shot and set

4x mode, just out of curiosity.

Cheers

Markus

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Reply to
mnentwig

While going to x4 mode definitely speeds things up, 5 seconds does sound like a long time unless you're using a very large part. Options for the SPI clock speed are also bitgen parameters. The default CCLK rate is rather slow, 2 MHz IIRC. You can set this as high as the actual flash part can go, but you need to take into account the wide (+/- 50% IIRC) frewuency tolerance of the internally generated CCLK. So while going to x4 mode increases config speed by a factor of 4, increasing the clock speed from default could give up to a factor of 50 for newer FPGA families and SPI parts. Doing both can speed things up by as much as 200 times.

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Gabor
Reply to
GaborSzakacs

Thanks. I'll look into the bitgen options one day. In the Planahead GUI, there aren't too many, have to read the manual one day.

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Reply to
mnentwig

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