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Problema when upgrading from Xilinx 8.1 to Xilinx 8.2

This is not strictly a call for help, it is more of a warning to everyone.

Yesterday, I tried to upgrade from ISE/EDK 8.1 to ISE/EDK 8.2, and also change from Xilinx Paralllel IV (it always worked as PC III) to USB Platform cable

Steps:

1) Uninstall all older versions. Easy, it works nice.

2) Install ISE 8.2 and all upgrades/sp's. Slow (lots of mb), but it works.

3) Import old CPLD project, rebuild it and dowload it via USB cable. pretty fine, no retires, no problems. Using USB21

4) Install Modelsim XE 6.1e with new USB dongle. After 4 retrials I finally noticed that when plugging the dongle on my XPPro machine, some drivers were being loaded that disabled the possibility to load the drivers coming with Modelsim, so that the dongle was not recognised and I could not register it. Apparently, the solution is: 4.a) Install Modelsim first time 4.b) Plugin USB dongle, and let OS do all the driver selection 4.c) Open device manager: right-click on MyPC, select Manage, on emerging window select something that should read device manager/hardware manager or anything of the sort, I have an spanish version of XPPro, and this is only a translation. 4.d) Uninstall Aladdin USB Key under USB controllers 4.e) Go to root folder of your modelsim installation, enter drivers folder, double click on flexid.exe. 4.f) On device manager, search for new hardware. It will install the new drivers for dongle 4.g) Reinstall Modelsim, and tell it that you have a Dongle but you *don't* want to install new drivers (That should be a "no" button on the fiirst dialog after installing, with a lot of lilterature over it) 4.h) Typically, you will have now a good license request wtith yoyr FLEX-ID=9-xxxxxx option right. If it is not so, reply to this POST with your solution, it might help other users!

5) Install EDK and SP. After that, open an 8.1 project. It tells me that it is upgrading some peripherals, but *not* microblaze and bram_if_ctrlr. Well, I suppose everything should be fine...

6) Clean all files, and rebuild system. No complains from synthsis/transalet/map/par/libgen/gcc.

7) Download contenst to FPGA through USB cable. No problems, using USB21, it gets downloaded but... it is not working. I know it, because the programa for the microblaze will switch on and off some leds, and there is not such event happening.

8) Well let's debug it. Launch XMD, it seems to connect using USB22, but it takes a long time to show the prompt (Warning!)

9) Launch MB_GBD. It will not connect to XMD

10) OK, maybe it is a problem with USB cable (have you noted that discrepancy between USB21 and USB 22?), so I plug my good old slow PC4 cable (remember: it is unable to work better than a PC3 cable!). It does not work either.

11) Oh, so the project is FUBAR: unsistall 8.2, restore backups, reinstall 8.1. Fine.

12) I will reinstall 8.2 *without* uninstalling 8.1, and work over copies of 8.1 projects to see where is the catch.

Followups expected (from me, certainly, from anyone else they are welcome...).

Regards

Zara

Reply to
Zara
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UPS cable will not work with EDK 8.1. Although impact correctly uses it as USB21, XMD tries to use it as USB22 and finds tha JTAG chain devices, but not the microblaze within a FPGS. Will file a WebCase later, if I don´t find some solution. meanwhile, I will install 8,.2 as alternative to 8.1.

Followups will certainly be coming soon.

Zara

Reply to
Zara

Pretty soon, really.

If I download the FPGA contents with impact through USB, and then I try to run XMD, it identifies the JTAG chain but not the jtag_mdm.

If I download the FPGA contents with impact through PC4(3), and then I try to run XMD, it identifies the JTAG chain, the jtag_mdm, the Microblaze... everything works fine.

Maybe there is some compatibility problem between impact and xmd? I suppose so, as there have always been intermittent problems with them when I switch from one program to the other for debugging purposes.

... to be continued...

Zara

Reply to
Zara

Zara schrieb:

Reply to
Antti

Continuing with the tale (please forgive me if I strip all teh contents from previous messages):

Now I do have a double Xilinx installation (8.1 and 8.2), with 8.1 working perfectly.

If I communicate with 8.2 XMD to a core created with 8.2, everything is fine, so there seesm to be no problem with XMD itself (al leats with ParallelCable III, tests with Platfrom USB are delyed until I stabilize the design).

When I upgrade the design (a copy of it, of course) to 8.2, the following modules are automatically upgraded: OPB, OPB_MDM, LMB, BRAM_BLOCK, DCM, OPB_INTC. The following are not upgraded: MICROBLAZE, LMB_BRAM_IF_CNTRL

And the design stops working, with MDM blocking before ending the inital protocol with the opb_mdm. Only once I could connect to it, and there I saw that some randomly distributed bits of an external ram failed to obey orders. As the connection to RAM is doen through my own designed IP, I suppose there has been some change with OPB bus that forces tihis failure. In fact, it seems that something may be running a little slower and timing is failing, without warning in spite of my putting constraints over all extern clock feedbacks.

Next chapter: Unupgrading the upgraded modules, will it be possible? Stay connected!

Reply to
Zara

But the versions remain the same! There must be something really strange happening, because the design in 8.1 uses 83% slices, and only

80% on 8.2

The only apparent changes on the design are the nominal upgrading os the above mentionaed modules (without changing the version number!) and changin the inputs to DCM from SIGIG= DCMCLK to SIGIS=CLK.Revesing such change gives me no benefit at all.

I will be trying some more possibilities. Should there be any improvement, I will tell you!

Reply to
Zara

I quit.

A brand new project, with only a dcm, a debug module, 16K ram, an uart and intc will not work (problems writing BRAM).

Will continue using 8.1 for a long time, I suspect

Reply to
Zara

Zara schrieb:

quit? your life?

EDK 8.2 does work I have done maybe over 50 EDK systems with 8.2

- all of them work

if your system doesnt there is something wrong and you should figure out what it is, not quitting.

Antti

Reply to
Antti

No, it was a figure of speech. Whta I really mean is that I will stop investigation while I am completing the current phase of my project. As soon as some 40something boarsd are delivered; I will resume trying.

As a sapnish adage goes "Last to be lost is Hope" ;-)

Regards,

Zara

Reply to
Zara

Zara wrote

It's Pandora. When she opened the box all the misfortunes of mankind flew out, leaving only Hope. Of course, you can argue that hope (9.1?) is the worst of all evils ;-)

Reply to
Tim

I am having about the same experience. I upgraded my computer to EDK/ISE 8.2

  1. I upgraded my GSRD2 (PPC, MPMC2, TEMAC) design to v8.2. There were actually no problems detected until I used the flashwriter.tcl script. I does not work at all. OK, minor thing to remedy.

  1. I upgraded my PPC CoreConnect project to 8.2. First the XMD connect failure (wrong processor version 0x00000000). Then I connected secesfully using "connect ppc hw", but the design does not work at all

- probably some hw error. The sw crashes when setting interrupt controller (working nice in 8.1).

Fu.. that 8.2 and hope for the SP2 to remedy the problems.

Cheers,

Guru

Zara wrote:

Reply to
Guru

I am jus wondering if ther problem lies:

  1. Either in the target selected (some problem with Syn/Xlat/Map/Par): I am using an Spartan 3: 3S400
  2. Or in the Computer: I am using an AthlonX2, both in the dual
8.1/8.2 installation, and in a clean 8.2 installation on a bran new laptop, that also fails.

Antti? Guru? Do you see any recurrence here?

Zara

Reply to
Zara

Using Virtex4FX12, laptop P4M 1.7GHz and ISE 8.1 SP3 and EDK 8.2 SP1. Strange, because I rebuld one MB project in 8.2 for S3ESK and it worked fine. I think this are some bugs that emerge from time to time. Lets pray that EDK SP2 will solve the problem.

Cheers,

Guru

Zara wrote:

Reply to
Guru

Well, in my case SP2 will not correct the problem. I am looking for some free time to dedicate it to nake some slow and painful step-by-step rebuild to see if I can spot the solution

Zara

Reply to
Zara

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