prevent ROM inferration

According to the manual you can use the "fsm_implementation" attribute to force state machine logic to infer a RAM, however it says that otherwise the FSM will encode using the "default FSM implementation for the target device", which seems to be RAM already in your case. I don't suppose you could break the case statement into smaller cases, perhaps by adding a pipeline delay?

Good luck, Gabor

By the way, Lattice ISE also comes with Synplify for synthesis, maybe you could get that working better?

Thanks for your answer. Maybe I can break the CASE statement, but this will certainly affect readability; so I am looking for a different solution. When reading the manuals (several PDFs, each hundreds of pages ...) I can only find how to specify that certain parts should be ROM (or RAM) blocks. When changing the logic, i.e. writing: attribute rom_block of : signal is false; this does not help.

I somewhere (in the manuals) read that the default size of a CASE statement to be implemented as ROM is 64, but not saying how to change that default.

When compiling with Synplify this does not occur. But it seems that with the latest version of ispLEVER Starter only Precision is supplied. It is possible to seperately download and install Synplify, but you need an extra license. It looks to me as if they want to remove it completely in future versions. My project is a kind of development board for educational application, so I want to keep the environment simple.

Johannes

This how-to addresses this issue in Verilog, should be similar in VHDL.

Tom

Thanks for the link, but I ended up with the same code as given in the Precision user manual, which I tried before and which does not what I want. I think this article focuses on block RAM vs. distributed RAM. I want Precision to implement no RAM at all but normal logic (LUTs).

Johannes

Hi Johannes,

Have a look at the use_resource attribute, this might enable you to force Precision into using LUTs, alternatively, sign up for the beta release which has a very nice graphical resource manager. Just select the instance, click on the pulldown button and change the ram to LUTs.

Hans

Thanks a lot for the hint; this is the right path. When doing this from within the Precision IDE it seems to work (the value of the use_resource property is "LOGIC", not "LUT"). But I cannot make this work from within ispLEVER. Obviously there are two other ways to specify an attribute: one is inside the VHDL source file with a special "attribute" statement, the other is via the precision command line. I was not successful to put it into the VHDL source. No matter what I type there is always a syntax error. From what I read from the Precision Reference Manual (precisionsn_ref.pdf, Precision Synthesis Reference Manual, 2005c February 2006, page 2-30 = page 50 of 404 in the .PDF) it should be: attribute USE_RESOURCE : string; attribute USE_RESOURCE of : instance is LOGIC; I put this into the "global section" of my VHDL source file (between "architecture" and "begin"). I always get >Syntax error at or near "instance"<

When trying to set it on the command line I was not yet successful either. There are TCL scripts generated on the fly and other TCL scripts included - I could not yet find the place where the actual command line is put together.

Johannes