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Power up Behavior of Virtex5 IOs

Hi,

I have a design which has Virtex5 LX30T.

On a particular IO, I have a external pull up of 4.7K, which connects to another device. I notice that at powerup that IO is driven down for

30msec before it gets tristated (and hence assumes state of logic high because of external pull up)

I have filed the webcase for the same and awaiting the response.

Does anyone has encountered any such problem.

This behavior makes the board design little tricky, because unintentional toggling on the IOs may cause some devices on board to behave abnormally during powerup and may lead to potential problems.

I have a particular SFP device, whose SCK signal (I2C clock) is connected in this fashion. And this is causing the I2C state machine inside the SFP device to go in freeze state. I can only get around this problem by jack out jack in of SFP.

-- Goli

PS: I am not following any voltage sequencing, my VCCAux and VCCint is derived from LDO using VCCIO (which is 3.3 Volts)

Reply to
Goli
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You can probably unwedge it by sending enough SCK signals to be sure you're out of the current "byte" (so 8) and then sending STOP (maybe it will take multiple stops as well). That's a theory I've been meaning to test myself...

--
Ben Jackson AD7GD

http://www.ben.com/
Reply to
Ben Jackson

Goli,

What is the Vcco doing on the bank?

Can you post a scope picture for me? Trace 1 = Vcco, Trace 2 = IO pin.

Or, send the .jpg picture of the scope shot to me directly (email is good).

Since every IO pin has an intrinsic diode to Vcco from the IO pin (it is the diode that is part of the pmos pullup stack) as Vcco comes up, the IO pin will be pulling down through the forward biased IO diode to ground.

Other than that, the IO is tristate all through the power ON (any sequence),cleanout, and configure until DONE goes high, when your design then decides what to do with the pin.

If the IO pin goes low AFTER DONE, then it is under your control (you are doing this).

So, where in this sequence is the pin pulling low?

Austin

Reply to
austin

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