hi,
using verilog how to write a module which has an inpput port for an array of 8 bit signals and how to write a test bench for it.
thank you. CMOS
- posted
17 years ago
ports of multidimentional arrays in verilog.
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- posted
17 years ago
Write it as several 8-bit vectors or as one n*8 bit vector. You can't pass arrays in Verilog or Verilog2001. There's also comp.lang.verilog.
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- posted
17 years ago
CMOS-
Wait until you try to initialize your arrays. Try this search in Google Groups:
initializing array of registers in XST group:comp.arch.fpga
It has been suggested that RAMs in general work better and are more flexible than arrays or registers or wires. I'm not sure though on whether it's possible to pass a RAM or RAM "base address" to a module.
-Jeff