I encountered the following problem in a design of a reprogrammable processing device. Not to go into to much detail :
I use PLB IPIF to connect custom cores on a PLB bus, transfers in between them and from/towards workstation are controlled by the PPC, master of this bus ... all IPIFs are slave only implemented
now since each IPIF implements FIFOs as buffer in between the core and the bus, i need to know if it possible to retreive from these FIFOs more then one data word without actually popping the data. At first my design implemented an intermediate buffer, so if i wouldn't be able to send data because of to little space at a certain time to a certain destination, it could have been buffered.
This design i cannot make anymore, since I didn't succeeded in implementing a ddr sdram for my board. I could use BRAM but i want to save it for the cores performing the algorithms.
Since I encapsulate my data on which an algorithm needs to be performed with headers and the first header serves for a device on which this PPC-IPIF system connects, the second dword is used for telling the PPC performing transfers the destination(s) of the data encapsulated by it. Therefor i need to extract all the headers withouth popping them, since i need a solution where they are not stored intermediate.
thx,
Paolo