Hi All, I am simulating a design with PCI X support (XILINX PCI X Core) to test MSI function of the PCI x device I am doing the following things at initialisation stage of the pci x device
- read capability pointers for MSI ID
- initialise PCI high and low addresses (64 bit)
- initialise 16 bit message.
- enable MSI in the MSI control register specifying no. of messages in bit [6:4] of MSI control register. I am facing following porblems
- The INTA line is not getting asserted. as I am enabling MSI.
- but no transaction is happening from the device for sending MSI when internally the interrupt is getting asserted. can anybody tell me if anything I am missing or anything is wrong. Thanks in advance Rgds kedar