Hi,
I have just begin my PhD on SDR and I will have to use a FPGA with partial dynamic reconfiguration. The system which interest me have a Xilinx Virtex-4 SX35 integrated on it and I'm not sure this FPGA can do it.
If someone could answer me, it'll be great.
Thanks.
I haven't looked at the Virtex-4 devices in detail, but Xilinx has included partial dynamic reconfiguration in their parts for several generations now. The trick is that they don't support this in software... at least very well. PDC sounds good on paper, but seems to be hard to implement and clearly there is not much demand for it.
I'm curious, what is SDR and why are you working on it?
G_Abg,
Yes, all V4 (and V5) parts are supported through the PlanAhead(tm) software tool for partial reconfiguration.
I suggest you ask your professor to request the PlanAhead software so that you may do what you need to.
The partial reconfiguration flow still has some "bumps" in it (even with the latest tools), but it now comes down to a steady improvement as we find and fix bugs, and add features (as we discover what customers really need).
Austin
SDR is for Software Defined Radio. I'm sorry but I'm not enough good in english to explain you what it consists of, I let you find it by yourself. (Perhaps one day my english will be sufficient to do that ^^)
About why I am working on it, it's very simple, I find this subject very interesting and mostly because I think it will open me good job opportunities after my PhD.
If you want more information about this subject, I could find some articles for you.
Thank you for your answer and for the links. I will look at it rigth now.
It is not an English problem, it is an abbreviation problem. We use so many of them that they become context dependent jargon that even people who work in the field don't always know what you are talking about.
I am very familiar with SDR, both the generic usage and the version defined by the US government which is a particular implementation.
Thanks, but I have been up to my ears in the topic. Yes, it should provide you with good job opportunities over a long span as more and more SDR related application open up constantly.
Hi I suggest you to perform extensive literature survey and visit mailing list at university of Queensland, Australia. They guys are doing a wonderful work in dynamic reconfiguration. Although Xilinx Jbits tool is rather obsolete now but playing with the tool can give a very good insight to FPGA for reconfiguration and then I would suggest you start working with EDK, PlanAhead and ISE for final application.
Best of luck for your research.
/MH
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