Hi all,
I'm using a Spartan 3 test board with a xc3s200 fpga. Before, I used a larger device (Virtex II ) and had no problems with my design (microblaze with my own IP, connected to the OPB-bus). But now, I get errors during the map process due to the small amount of slices... --> it seems that the device is too small. But: when I don't connect my IP with the OPB, everything's fine. At the moment when I click in Xilinx Platform Studio on the white square to connect to OPB that a 'S' appears , the problem with the overmapped slices occurs. Without connection about 50% of slices are used, connected to the OPB more than 230%. How could that be possible?? I'm using the latest versions of ISE and XPS.
Thanks in advance,
Stefan