Hi,
I'm currently working with the I2C core supplied by OpenCores.org. I have successfully got the design to work in an FPGA.
However, all of the slave device I used may not have the clock stretching feature implemented. As a result, I am not sure if this I2C core uses the included clock stretching feature correctly. I tried looking at the code, but could not find any code that implies clock stretching logic. The documentation for this core also lacks information regarding the clock stretching. Has anyone used this core with a slave that performed clock stretching?
If you're familiar with this core, my control logic for this core simply sends the instructions that's required for read/write and waits for interrupts, ack/nack, and TIP logic to assert/deassert. Do I need to add logic to detect clock stretching?
Thanks,
-M