Hello,
I'm trying since yesterday to interconnect the opencore mac to a microblaze design. After several problems solved, I'm stuck.
The "Generate netlist now works fine" but When I try to "Generate bitstream", I have three errors from NgdBuild :
ERROR:NgdBuild:604 - logical block 'wb2opb_0/wb2opb_0' with type 'wb2opb' could not be resolved. A Pin name mispelling can cause this, a missing edif or ngc file, or the mispelling of a type name. Symbol 'wb2opb' is not supported in target 'spartan 3'. ERROR:NgdBuild:604 - logical block 'opb2wb_0/opb2wb_0' with type 'opb2wb' could not be resolved. A Pin name mispelling can cause this, a missing edif or ngc file, or the mispelling of a type name. Symbol 'opb2wb' is not supported in target 'spartan 3'. ERROR:NgdBuild:604 - logical block 'wb_ethermac_0/wb_ethermac_0/maccore' with type 'eth_top' could not be resolved. A Pin name mispelling can cause this, a missing edif or ngc file, or the mispelling of a type name. Symbol 'eth_top' is not supported in target 'spartan 3'.
For the wb_ethermac core, I've created a file that includes the eth_top of the ethernet mac core on opencore and present the interface to the outside world. I've done this as a ISE project then I synthetized it to have a .ngc file (because I have both VHDL & Verilog there) then I created an IP from this netfile and my vhdl top file.
Any one has a clue on what to do ? Has anyone make this work ? (I'm using ISE/EDK 6.3)
Thanks,
Sylvain