I would like to use Odelay primitive to delay a signal generated in the virtex5 fpga fabric. For this I am hoping to use IODELAY as shown below.
mlinit_in_l is the signal I would like to delay it in 75 ps resolution using odelay as it goes out to the fpga.
mlinit_l is supposed to be the delayed signal but the output stays low. Thus it is not working.
I would like to know how I tell the IODELAY primitive about using it as ODELAY and specify 75 ps resolution?
The user's guide does not seem to have a lot of inofrmation about this.
module linit_delay(mlinit_in_l, mlinit_l);
input mlinit_in_l; output mlinit_l;
IODELAY linit_dly1(.DATAOUT(mlinit_l), .C(1'b0), .CE(1'b0), .DATAIN(mlinit_in_l), .IDATAIN(mlinit_l), .INC(1'b0), .ODATAIN (mlinit_in_l), .RST(1'b0), .T(1'b0) ); endmodule