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no output from BUFGMUX

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I'm using a BUFGMUX but consistently get no output, even though one clock is always active. I was hoping that if:

-the always active clock is on I0 -the possibly active clock is on I1 -the Sel line was tied to a reg held at zero

that I would get I0 as output, and later if I1 clock was detected, logic set the reg and utilize I1. But no luck.

According to Xilinx doc the BUFGMUX should initialize to I0. I've made sure the register used for the Sel line is always low. I've tried connecting the always active clock to both inputs -- that works. I've read previous posts about BUFGMUX (including Austin and Peter) explaining that the clock being switched away from must be toggling.

Is there any other reason why a BUFGMUX would fail to use I0 as output?

Jeff

Reply to
Jeff Brower
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Jeff, if you are talking about virtex4, you have some attributes to play with with PRESELECT_I0 FALSE(default), TRUE PRESELECT_I1 FALSE(default), TRUE

you should try to set the PRESELECT_I0 true (to select you always active clock)

or try to tie the Sel line to VCC to see if will change the behavior

Aurash

Jeff Brower wrote:

Reply to
Aurelian Lazarut

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