I would like to evaluate the true performance of the various CPU cores available for FPGAs and I found that the "economy" version of the NIOS core uses a minimum of 6 clock cycles to complete an instruction! I guess they use the same division of logic and registers for all their cores, but change how they run in parallel. In fact, the smallest "economy" version runs at highest clock rate. But if you divide that by 6 to be an instruction rate, you only get about 33 MHz "true" performance. I guess that is why the DMIPS is only 31 vs. 218 for the "performance" version.
How are DMIPS measured for a core? Is this done by measuring a benchmark program?
It can be hard to collect all the necessary data for comparing the various cores available. This is especially true for the open-source versions. There are quite a number of cores available at opencores.org, but most do not provide any real data on their capabilities.
Antti mentioned in a post that there are three NIOS clones and I found one MB clone at opencores.org. Where are the NIOS clones hiding and are there any other MB clones? Has anyone collected data on their speeds and sizes?