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MPMC2 + flash bootloader problem

Hello,

Does anyone else have problems with MPMC2 + flash bootloader in EDK v9?

I started a design on the FX12 mini-module using the ethernet echo server reference design from Avnet. I then added a flash bootloader functionality by taking the flash controller from another Avnet reference design. Unfortunately this combination doesn't work for some reason.

A webcase with Xilinx (opened for one month) did not offer a solution for this issue. Avnet however was quicker to respond, they acknowledged the problem, quoting : "The bootloader design in EDK

9.1.02 using the MPMC2 core has some issues.". They sent me a modified echo server design using the PLB DDR controller instead of the MPMC2 and it works. Unfortunately the perfomance suffers.

I have yet to understand what the particular issue is. It is not clear if this is a flaw intrinsic to MPMC2 or if it's related to the FX12 mini-module. I'd like to know about others experiences with the MPCM2 and/or mini-module.

Thanks!

Patrick Dubois

Reply to
Patrick Dubois
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Hi Patrick,

I am working with a FX12 MiniModule and MPMC2. I have tried lots of variations for FLASH booting. I have not implemented OPB_EMC in my latest design (under EDK 9.1) since I have not enough logic resources. My experience from EDK 8.2: in core connect architecture (no MPMC2) Flashwriter and booting works with OPB_EMC and PLB_EMC (uses more logic resources). The Flashwriter.tcl had to be modified from 8.1 to 8.2 because some of the functions changed. In MPMC2 architecture the Flashwriter fails but I was able to boot from flash if programmed from other HW (i.e. CoreConnect). If you find any more detail please let me know.

Cheers,

Guru

Reply to
Guru

I should have been more precise, it is indeed the Flashwriter that fails. Your idea of using a different architecture for the Flashwriter part is very good, I should have thought of that. I just tried an architecture without MPMC2 (the ref design from Avnet mentionned above actually) and not surprinsingly, Flashwriter works.

Now going back to the MPMC2 design however, the bootloader fails in a strange way. It successfully loads the whole program into DDR but fails at the very last memcpy. This is the memcpy that copies the address of the beginning of the program to 0xFFFFFFFC. For some strange reason, the program never returns from that call to memcpy.

I verified with a memory dump that the MPMC2 architecture can succesfully read without error the whole program in flash. The dump is exactly the same as my .srec file.

I am puzzled by this.

Patrick

Reply to
Patrick Dubois

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