Modelsim ought to be cheaper

Why is Modelsim so expensive? It is a mature product and yet it segfaults on me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out w hy it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.

Reply to
Kevin Neilson
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me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.

An argument could be made that it's so expensive even with its segfaults because, even with it segfaulting all the time, you were willing to pay them as much as they asked for it.

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Rob Gaddi, Highland Technology -- www.highlandtechnology.com 
Email address domain is currently out of order.  See above to fix.
Reply to
Rob Gaddi

me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.

I am using ActiveHDL which is a competing product, but both are free as far as I know. I don't buy them, I get them with the vendors free tools. I guess when you pay for them you get a version that isn't crippled and runs faster. Most of the stuff I do the simulation doesn't take so long that this is a problem.

I've never seen the sort of bugs you are talking about. I do remember that some 10 years ago they had a memory leak that would crash it after running for some hours. I never saw them fix that problem, it continued release after release.

I only switched to AHDL because Lattice switched tools. I ordered a paid version of their tools (at that time they didn't give a simulator) and between the time I placed the order and the time I received it an tried to fire it up, it wouldn't license! Seems they switched brands and I *had* to use AHDL whether I wanted to or not. I ranted and raved for a bit (that was pretty dirty pool) but in the end I didn't see much of a difference and like AHDL pretty well. I think they have a trial version, you might give it a try. I don't see it crashing like you are saying Modelsim does.

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Rick
Reply to
rickman

me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.

Yes, you could make that argument... but why bother?

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Rick
Reply to
rickman

Mature product? you do know that simulators are constantly being enhanced with new language features, standards and debug capabilities. The last thing I would call a simulator (or any maintained EDA product) is mature.

Then either you are very unlucky, have a unreliable PC or have a "nack" for writing disastrous code, sorry but I have been using Modelsim since version 4.7 and yes it does occasional crash but no more than any other EDA tool I use.

there is a port

Port mismatches very rarely result in a core dump, if it does then contact Mentor support. Modelsim create a stack dump in vsim_stacktrace.vstf when it crashes, include this in your Service Request. I also find that using the command line "vsim -c" has a better chance of giving me a verror code.

leaving me to comment out lines one at a time until

single stepping might be quicker. Using a different version (like 10.0f which was released after 10.2a) might also allow you to continue to work while engineering looks at your core dump.

That's my rant. It's still pretty decent, but ought to be

I agree, EDA tools are too expensive but then again the user group is pretty small and as I mentioned earlier standards are being created and updated all the time which cost money.

Now why is Vivado-HLS crashing again on my code.......

Hans

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Reply to
HT-Lab

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What version are you running? Which OS? How much memory has your PC? Which language are you writing in?

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Reply to
RCIngham

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If that's your definition, then virtually no product would ever be 'mature' .

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Don't blame the user. I've seen the same behavior with every single 10.x r elease. At which point I'll write up a service request, Mentor will reprod uce it and many times I'll have to revert back to version 6.4 which for me at least was the last really stable release.

Kevin Jennings

Reply to
KJ

On the subject of Modelsim, how does it relate to Questa SV/AFV? I've read various things that refer to Questa as if it's Modelsim renamed, but others that suggest they're different simulators (ie there's a non-trivial overhead in switching from one to the other). I realise there's other things called 'Questa', just to make this more confusing.

Currently we're on Modelsim 6.5c and have Questa 10.1d available (but not installed) - I'm wondering how transparent the upgrade path would be.

Theo

Reply to
Theo Markettos

's going to coredump like freeware.

I never had too many problems with Modelsim...But all hardware tools and si mulators are very expensive. More than what would be logical for their cost . But it is a small market with few competitive tools and since there is la ck of options even these high prices are paid...Is there a open alternative that is competitive? That would help the situation a lot. GHDL for example ? Has anyone used it? does it fare well compared to other commercial simula tors?

Reply to
turin231

going to coredump like freeware.

simulators are very expensive. More than what would be logical for their cost. But it is a small market with few competitive tools and since there is lack of options even these high prices are paid...Is there a open alternative that is competitive? That would help the situation a lot. GHDL for example? Has anyone used it? does it fare well compared to other commercial simulators?

If your designs are not that large and you are happy with a single language then I would recommend the free OEM version of Modelsim. You can get it from Altera, Microsemi, Lattice etc. Xilinx Isim is also free and getting better with every version.

Altera also has a paid for Modelsim AE version which sits just below PE in terms of speed and capacity, the price in the UK is about a 1000 pounds.

Hans

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Reply to
HT-Lab

s on me all the time. Constantly. Often, when it ought to give me warning s or errors (such as when there is a port width mismatch) it just core dump s instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought t o be cheaper if it's going to coredump like freeware.

I use Questa on Windows 7 64 bit on intel based machine for my SystemVerilo g designs. I can tell you that I have never seen a coredump lately. Nonet heless, occasionally, the tool would simply exit with a cryptic code during compile, optimization or elaboration stage. At which point I have to file a support request. Sometimes, I would be able to get an idea on the probl em - something silly, by turning off the vopt switch at which point I would think why wasn't the tool able to flag this without giving up!

What would be the groups' sentiment if there was a cloud service to use the tool on a timeshare basis?

I can see a win-win scenario for vendors and the developer community.

Reply to
Sanjay Parekh

I discovered one cause (but not all) of the coredumps I experience. If I h ad mismatched port widths in a VHDL instantiation, I'll often have coredump s. There is no indication of what is wrong, but now I know what to look fo r in some cases. I also suffer all kinds of problems when I try to use unc onstrained outputs based on unconstrained inputs, to the point where I just have to avoid that feature of VHDL.

I think it'd be great to have a cloud service you could use if you didn't n eed to use it that often, but I don't know if that would be profitable for Mentor.

Reply to
Kevin Neilson

had mismatched port widths in a VHDL instantiation, I'll often have coredu mps. There is no indication of what is wrong, but now I know what to look for in some cases. I also suffer all kinds of problems when I try to use u nconstrained outputs based on unconstrained inputs, to the point where I ju st have to avoid that feature of VHDL.

need to use it that often, but I don't know if that would be profitable fo r Mentor.

In my case, the tool choked miserably whenever I misinterpreted the systemv erilog spec and hooked up interfaces incorrectly.

In my opinion Mentor can use the cloud platform quite creatively and make a business out of the unmet need which is allowing engineers to build myriad pieces of ip that serve niche areas without going through a vetting proces s to justify a big budget and therefore a big market.

And think of the community schools that generally offer programs in c progr amming, etc. Why not programs in verification, linting, scripting, simple designs, etc.? More side opportunities for consultants/senior engineers as trainers, more opportunities for the students to learn online. E.g. If cou rsera/udemy can offer software courses, why not hardware courses as well? And think of kickstarter/indiegogo which can fund those hardware projects.

Enough said. I don't mean to say that cost of the tools is the only thing that is preventing massive innovation in the hardware development. But I f eel it is an important part as it limits the creative ability of the people who can make a difference.

Reply to
Sanjay Parekh

I had mismatched port widths in a VHDL instantiation, I'll often have core dumps. There is no indication of what is wrong, but now I know what to loo k for in some cases. I also suffer all kinds of problems when I try to use unconstrained outputs based on unconstrained inputs, to the point where I just have to avoid that feature of VHDL.

't need to use it that often, but I don't know if that would be profitable for Mentor.

mverilog spec and hooked up interfaces incorrectly.

a business out of the unmet need which is allowing engineers to build myri ad pieces of ip that serve niche areas without going through a vetting proc ess to justify a big budget and therefore a big market.

gramming, etc. Why not programs in verification, linting, scripting, simpl e designs, etc.? More side opportunities for consultants/senior engineers a s trainers, more opportunities for the students to learn online. E.g. If c oursera/udemy can offer software courses, why not hardware courses as well? And think of kickstarter/indiegogo which can fund those hardware projects .

g that is preventing massive innovation in the hardware development. But I feel it is an important part as it limits the creative ability of the peop le who can make a difference.

Interesting read today if you can see as I do the opportunities for cloud b ased tools..

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Reply to
Sanjay Parekh

need to use it that often, but I don't know if that would be profitable for Mentor. ..

based tools..

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I don't think cloud EDA services will happen soon for the simple reason that companies are generally not happy to splatter their highly valuable IP over the internet.

You have an additional problem that the servers are normally not located in your country which means you have to fight a foreign court system if something goes wrong (server hacked, IP theft, etc).

Hans

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Reply to
HT-Lab

s on me all the time. Constantly. Often, when it ought to give me warning s or errors (such as when there is a port width mismatch) it just core dump s instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought t o be cheaper if it's going to coredump like freeware.

The simulator in Quartus is nice and has a "functional simulation" mode tha t makes the compile fairly trivial and quick. Altera unfortunately unbundl ed it from the main GUI after 9.2SP2 and turned into an ugly rickety Tcl ba sed unintegrated monstrosity. At the time the rep told me "no one uses it" .

Don't mind me, I'm a just a nobody.

Reply to
Eric Wallin

I'd really like to make some cores in my spare time, but the revenues would be pretty small, and there is no way it would be worthwhile to buy Synplif y and Modelsim licenses for such a small endeavor. I don't know exactly wh at that would cost, but I'm sure it's tens of thousands. It'd be great if I use the tools online for a few hours here and there and just pay for that . Even if I couldn't use the GUI--if I could just get an EDIF and .srr fil e back--that would be useful.

I guess I could use Icarus or something, but I'm sure it's not going to par se the nice SysVerilog / VHDL 2008 code I write, and who wants to buy a cor e that comes with an Icarus project file?

Reply to
Kevin Neilson

pretty small, and there is no way it would be worthwhile to buy Synplify and Modelsim licenses for such a small endeavor. I don't know exactly what that would cost, but I'm sure it's tens of thousands. It'd be great if I use the tools online for a few hours here and there and just pay for that.. Even if I couldn't use the GUI--if I could just get an EDIF and .srr file back--that would be useful.

I know Modelsim isn't that high, or at least it wasn't some 5 years ago. I think I was quoted $5k give or take. But then it is another $1k per year maintenance. The point is the company has to have a given level of revenue and even if they adopt a per use based pricing structure, they would have to charge pretty steeply for each use to get that same level of revenue.

The only way it could become less expensive is if they ended up with a lot more sales. I'm sure they have looked at it and found the "sweet spot" for pricing maximizing their profit. After all, that is what it is about.

the nice SysVerilog / VHDL 2008 code I write, and who wants to buy a core that comes with an Icarus project file?

Why can't you use the free versions of the tools provided by the FPGA vendors? You get Active-HDL from Lattice, i think Xilinx has their own simulator and I don't know what Altera offers. What does Microsemi offer these days since they bought Actel?

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Rick
Reply to
rickman

be pretty small, and there is no way it would be worthwhile to buy Synplify and Modelsim licenses for such a small endeavor. I don't know exactly what that would cost, but I'm sure it's tens of thousands. It'd be great if I use the tools online for a few hours here and there and just pay for that.. Even if I couldn't use the GUI--if I could just get an EDIF and .srr file back--that would be useful.

the nice SysVerilog / VHDL 2008 code I write, and who wants to buy a core that comes with an Icarus project file?

Altera offer Modelsim Altera Edition (linked to the subscription edition of Quartus), and Modelsim Altera Starter Edition (completely free). Obviously they have limited capacity compared to the full edition of Modelsim - but they do have a surprising range of language support, include the design features of SystemVerilog.

There is a "cloud" version of Aldec Riviera - I don't know how much it costs. See

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Microsemi Libero SoC comes with a version of Modelsim, and of Synplify.

regards Alan

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Alan Fitch
Reply to
Alan Fitch

If I had mismatched port widths in a VHDL instantiation, I'll often have co redumps. There is no indication of what is wrong, but now I know what to l ook for in some cases. I also suffer all kinds of problems when I try to u se unconstrained outputs based on unconstrained inputs, to the point where I just have to avoid that feature of VHDL.

dn't need to use it that often, but I don't know if that would be profitabl e for Mentor.

temverilog spec and hooked up interfaces incorrectly.

ke a business out of the unmet need which is allowing engineers to build my riad pieces of ip that serve niche areas without going through a vetting pr ocess to justify a big budget and therefore a big market.

rogramming, etc. Why not programs in verification, linting, scripting, sim ple designs, etc.? More side opportunities for consultants/senior engineers as trainers, more opportunities for the students to learn online. E.g. If coursera/udemy can offer software courses, why not hardware courses as wel l? And think of kickstarter/indiegogo which can fund those hardware projec ts.

ing that is preventing massive innovation in the hardware development. But I feel it is an important part as it limits the creative ability of the pe ople who can make a difference.

based tools..

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Aldec seems to get it. So does Altera. Read an interesting article today. Looks cloud based tools are coming.

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Reply to
Sanjay Parekh

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