Hi. I have a question. I have a special y=f(x) function. It takes 32 bit at input and it have something at output. Function is unrolled, it computes result alsmost "immediately", and it doesn't contain any memory cells and flip-flops, it is what called "combinatorial". I need to fill a table of all possible x's and function results. If x is 32-bit, I just make 32-bit counter connected to the block which compute the result and collect results. As yet it all simple. But I feel that by rewiring bus between counter and f(x) block, I can reduce the number of gates changed its state at each counter's iteration, and vice versa. Thus to reduce power consumption. (I may have x in any order, my task is just to have all possible values of x at some moment). So, is there any tool that can take my f(x) in form of Verilog or VHDL and tell me what is the most optimal wiring scheme?
- posted
16 years ago