"Mine is bigger than yours..."

BTW, there are dev kits available for Cyclone II. The DSP dev kit, Cyclone II edition and the Nios II dev kit, Cyclone II edition (which use an EP2C35) are now shipping. The PCI dev kit, Cyclone II edition will start shipping next month. Customers can place orders for all these today.

DSP:

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Nios II:
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PCI:
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Regards,

Paul Leventis Altera Corp.

Reply to
Paul Leventis
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"Paul Leventis" schrieb im Newsbeitrag news: snipped-for-privacy@z14g2000cwz.googlegroups.com...

those all are WAY over priced compared to hpe-mini

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Antti PS Paul, I recently sent you an private email, just out of curiosity did you receive it?

Reply to
Antti Lukats

-snip-

As a frequent Xilinx user (4K, Virtex-2, V2P, soon V4), I note that in the slice (2 4-input LUTs), there is also available a 3-input LUT following those two. That LUT can be fed the input of [at least] one independent input (besides the outputs from the two 4-input LUTs), creating the opportunity to broaden the input set with minimal cost (delay, routing.) I have also extensively used the distributed RAM (sometimes as ROM), and occasionally the SLR function.

I also have had occasion to use Altera, although not lately. In '96 I had a design where Altera had the appropriate solution (love those embedded block RAMs, which Xilinx now has--features may vary), but in '97 I had a design where Xilinx was better from a planning perspective (read: growth path.)

Over the past 10+ years, I've had to get "under the hood" of the Xilinx tools: hand floorplanning, extensive timing constraints, reading lots of app notes. So you could say that I'm fairly comfortable with their architecture(s) and tools. However, I'd have to agree with some previous posters: if you think you have a challenging design, evaluate what you can before committing. That's what I have done in the past, and prefer to do in the future (though usually, I'm stuck with a pre-determined selection.) Typically, you can budget key resources (be that memory, LUTs, registers, multipliers, pins, ...) You can also do a test-case design that tests the anticipated critical path. The same principle applies for synthesis and simulation tools, too.

Jason

Reply to
jtw

Hi Edwin,

I'm glad you had a positive experience with Quartus and Stratix II.

I'm sorry to hear you got an unroute in one of your compiles though. I'd greatly appreciate it if you could send me the design, so my team can take a crack at routing it. We don't have very many unroutes these days, even at very high logic utilization, so case studies like this are very useful for improving our tools. We would use the design only to tune our tools, will never release it outside Altera, and frankly we won't understand your design as anything but a place and route problem instance anyway :).

It's most likely we can route it in house with more "routability tuned" compiler settings, which we will send back to you as well.

Regards,

Vaughn Betz [v b e t z (at) altera.com]

Reply to
Vaughn Betz

I have an Altium Altera board(and a xilinx one) It doesn't come with any project file ready to use with Quartus and you have to work out the connections as well. Only annoyance is lack of config prom.

The lack of Quartus project files means it is unsuitable for beginners unless they are using it with the Altium software.

That future board is not even in the same league as the Spartan 3 starter kit.

Alex

Reply to
Alex Gibson

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