Hello,
Why does Xilinx MIG controller support DDR dimm at only 165 MHz in Virtex-4 ? (175MHz in -12). I remember seeing a 200 MHz reference designs for DDR memory in a V2Pro!
Quoting from the white paper "Memory Interfaces Made Easy with Xilinx FPGAs and the Memory Interface Generator": "For high-performance applications, pushing the limits of the memory interface bandwidth like 533 and 667 Mb/s per pin DDR2 SDRAMs, Xilinx offers the Virtex=E2=84=A2-4 and Virtex-5 FPGAs, which are capable of meeti= ng the highest bandwidth requirements of most systems today."
533? That's like 266 MHz. 200 MHz should be easy for MIG then. 165 MHz is a far cry from the marketed 266 MHz.AR23862 answers part of this question (something about idelay jitter). Still, I feel that the MIG design should be able to extract more performance from the V4 fabric.
Side question, why can MIG acheive 220 MHz with DDR2? That's like 33% faster.
Thanks.
Patrick