We're into this signal processing project, using a microZed/ZYNQ thing as the compute engine.
After a week or so of work by an FPGA guy and a programmer, we can now actually read and write an FPGA register from a C program, and wiggle a bit on a connector pin. Amazingly, the uZed eval kit does not include a demo of this, and the default boot image does not configure the FPGA!
We're using their build tools to embed the FPGA config into the boot image. We'd really like to be able to have a C program read a bitstream file and reconfigure the FPGA, but we haven't been able to figure that out.
If we run a C program that wiggles a pin as fast as it can, we can do a write to the FPGA register about every 170 ns. Without any attempts at optimization (like dedicating the second ARM core to the loop) we see stutters (OS stealing our CPU) that last tens or hundreds of microseconds, occasionally a full millisecond. That might get worse if we run TCP/IP sessions or host web pages or something, so dedicating the second ARM to realtime stuff would be good.