microblaze using SysGen

Hi,

Matlab SysGen provide a microblaze module that we can have the design of microblaze processor together with other FPGA logic solely defined in the SysGen design environment. But when I try to place more than one microblaze module, says two microblaze communication through some FPGA logics, SysGen fails to compile such a case. Are there any solutions to achieve multi-microblaze in one chip?

Many thanks, Terrence

Reply to
Terrence Mak
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Hi Terrence,

SysGen currently only supports single processor designs. The work around is to create one half of a design in SysGen, and to export that to the EDK. From the EDK add in the required number of MicroBlazes and connect them up via the EDK-SysGen export.

For example, have one Microblaze connect up to your SysGen logic, connect the ports that would otherwise link up to your second MicroBlaze to SysGen gateway blocks. When you export this design, the gateway ports will become toplevel ports in the exported pcore.

You can than go into EDK and link the 'dangling' pcore ports to another MicroBlaze.

Hope this helps.

Cheers, shay

Terrence Mak wrote:

Reply to
Shay Seng

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