Maximum bus speed of APB.

Hi, there:

I am reading AMBA specification. Does the Read/Write waveform for the APB indicate the bus speed is 1/3 of the pclk frequency? Now if I need to write a continuously in every clock cycle, may I keep the PWRITE, PSELx and PENABLE high for many cycles while keep changing address and data every clock cycle? OR, am I obliged to use AHB's burst moode?

Thanks.

Reply to
Invincible
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The AMBA APB bus does not support bursting. All accesses are of a fixed length (3 clocks). Typically an application that uses an APB bus also has an APB bridge that connects the APB bus to an AHB bus. You can busrt on the AHB bus if you like .... the bridge will convert that to fixed length cycles on the APB bus and insert wait states in the AHB burst.

Reply to
Mike Lewis

Yeah, in the specification it is 3 clocks for each transfer.

however now if i want to put burst data on it, but i will change the state machines in the APB slave, meaning i am not following the APB protocol any more...

Does that work?

of

the

Reply to
One Day & A Knight

Well if your not following the protocol any more .. you're making your own protocol so anything will work as long as you design it right. :)

You would also have to change the protocol of the AHB to APB bridge or whatever master device you have driving the APB slaves. Mike

every

Reply to
Mike Lewis

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