making an fpga hot - addendum

Hi,

there was a thread with the same topic here:

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In addition to this I would like to know if it is possible and advisable to make an FPGA hot by intentionally creating contention within the FPGA.

I know that this it not possible with HDL but with JBits this should be possible.

Thank you.

Reply to
comparchfpga
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Why making short cicuits? A hugh shift register clocked at a high frequency (maybe DLLed x2 or x4) does it nice an legally. Been there, done that.

Regards Falk

Reply to
Falk Brunner

Use the old method: Looong shift register with the input flip-flop toggling. Gives you nicely distributed power, no reliability concerns, and extremely fine control through the clock frequency. What more can you possibly want?

Peter Alfke

Reply to
Peter Alfke

Falk and Peter,

the methods you are mentioned are described in the thread I referenced. I accept that these methods are the best way to go.

I beg your pardon, but my question remains unanswered. What is the problem with internal contentions ?

Thank you.

Reply to
comparchfpga

Well, in some architectures it can destroy the device. It may do this within a couple of seconds in some architectures!

Jon

Reply to
Jon Elson

Internal contention creates local currents that are higher than normal, and - in some situations- can overstress the transistors or the interconnect. Metal migration used to be a concern, but is far less so with copper metal today. Anyhow, it is always scary to exercise something that was not meant to be exercised, especially when you have a couple of hundred million of these things on a chip. Why risk anything? Life is too short and too precious to worry about things that are avoidable... Peter Alfke

Reply to
Peter Alfke

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Yes

NO

Reply to
Jim Granville

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