LZW compression and decompression in vhdl

Hi, can somebody help me to find an implementation of LZW compression/decompression algorithm in VHDL?

Thanks a lot.

Eric

Reply to
eric
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I'd be surprised to see anything for free. I was working on an LZW style algorithm for my employer because there just isn't much out there that you can get without paying big $$ to the big players in IP. I found later another internal group in our 50k+ employee company also developed an LZW style algorithm for their ASIC work.

You might be able to find the algorithm for big money.

LZW is a memory-hungry scheme and will take up a large chunk of your memory resources especially if you have more than one stream. Interoperability is another issue if you expect to work with other "standard" LZW schemes as opposed to something proprietary. I can understand why there wasn't anything out there when I was developing the algorithm for a proprietary, closed system. It's still a push for me to consider it in the newest generation of low cost FPGAs.

Reply to
John_H

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