LVDS through connectors

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
Hi all,

I'm designing a system in which a 4-bit + clock LVDS point-to-point bus
has to connect two FPGAs. The two FPGAs are on two different boards--one
is on a mainboard and the other is on a plug-in board.

What kind of board-to-board connector is recommended for high-speed
(~400 Mbps) LVDS signals? Connector parameters to look for? Signal
integrity issues? Board layout with regard to the connectors? Rules of
thumb?

Thanks,
-- Georgi

Re: LVDS through connectors
take a look at samtec

they have good ones! But be careful: They are pretty hard to solder, because
of the fine pitch.
QSH series

regards,
thomas



Re: LVDS through connectors
Quoted text here. Click to load it
bus
boards--one
Quoted text here. Click to load it
of

Howdy Georgi,

I hate to say that it doesn't matter, but in the grand scheme of
things, the type or style of the connector is not of huge importance at
that speed, as long as one pin isn't massively longer than another
(which occurs with some types of right angle connectors).  We run many
times that speed using the worst connector you can imagine.

Much more important is the stuff that Brad mentioned: keep _p/_n pair
trace length the same and routed as a diff pair into and out of the
connector - and routed against a ground plane if possible.  Give
yourself a ground pin next to each pair within the connector.
Have fun,

   Marc


Re: LVDS through connectors
Quoted text here. Click to load it

Not true.  Its not the frequency that matters but the edge rate.  Given
the 4 bits and clock it sounds an awful lot like the TigerSHARC link
port and it has a very fast edge rate.  The data sheet indicates a MAX
of 200ps (that's pico-seconds).

Anyways, at that edge rate any change in impedance in the trace will
cause reflections.  If the path of the differential pair through the
connector has a different impedance than the rest of the trace you will
get a reflection.  In fact you'll get two--one at each side of the
connector.  That is the difference in high-speed connectors--they pay
attention to this.

Now it is true that the trace length through the connector needs to be
matched as well.  Otherwise you'll get the + and - signals getting out
of phase.

You'll always have slight mismatches in impedance and trace length.  But
with a 200ps edge rate you have a lot less margin for error than at more
reasonable rates.

Hope that helps.



Re: LVDS through connectors

(snip)

Quoted text here. Click to load it

If you believe in Fourier you know that edge rate is frequency.

Quoted text here. Click to load it

Well, the two reflections will partially cancel in many cases.
That is why you don't notice them at lower frequencies.
Even at 200ps the wavelength is still significantly longer
than most connectors.

Quoted text here. Click to load it

Out of phase relative to what?  There are coaxial cables where
the center conductor is helical to increase its inductance.
Signal velocity depends on the inductance per unit length
of the shield and center conductor, but one doesn't arrive
at the other end ahead of the other.

-- glen


Re: LVDS through connectors

Quoted text here. Click to load it
importance at
many
pair

Howdy James,

I was figuring that someone would disagree with what I said - I just
didn't figure it would be within a half hour!

I was actually referring to the whole solution when I was referring to
the speed: signalling type (LVDS, which has slower edges than PECL and
CML), termination location (hopefully on-chip), voltage swing, etc.

Quoted text here. Click to load it
MAX

No arguing that 200ps is fast.  But it is fast enough to cause problems
on a properly terminated and routed differential pair?  Our extensive
experience on our telecom boards have shown it isn't even close to
causing problems.  In fact, I was referring to both CML *and* LVDS when
I was mentioning our past experience.  CML has edge rates closer to
100ps.

Quoted text here. Click to load it
will

And the the termination that differential signals have do an excellent
job of minimizing those reflections.  Go check out the people running
LVDS buses with 20 drops!

Quoted text here. Click to load it
be
out
But
more

The beauty of terminated differential signalling is that you have such
an improved signal infrastructure, I think you actually have more
margin than you had with signal ended, unterminated signals that swing
all the way from 3.3v, even if their edge rates were "only" 1.5ns.  I
think that's where people go wrong... while the concepts between
unterminated single-ended and terminated differential are close to the
same, the rules of thumb for one don't translate well to the other.
I stand by my original post.  Let the flames begin.

   Marc


Re: LVDS through connectors

Quoted text here. Click to load it

Life is all about timing!

Quoted text here. Click to load it

I don't disagree with what you've said and appreciate the insight from
your past experience.  I guess what I was reacting to is the concept
that the connector doesn't matter.  It does matter, but as I said, it
all depends on how much margin you have in your design.  In a particular
design it may or may not matter based on a hundred other factors.

As you mentioned, in a lot of ways differential signalling is a whole
lot easier to deal with.  Of course there is no such thing as a
single-ended signal.  Ground is typically the other end that happens to
be common among all signals.

James.


Re: LVDS through connectors
Quoted text here. Click to load it

Thanks for the replies, they really help me get a better picture! I
don't have TigerSHARCs, just two Spartan-3 FPGAs.

I wonder what is the acceptable mismatch between the traces of an LVDS
pair? Given ~6 in/ns propagation speed and, let's say 0.2 ns rise time,
the rise time length is 1.2 inches. Is something like 10% of that, or
120 mils, acceptable trace length mismatch? I think it will be even
lower than that when the final routing of the board is done.

Any thoughs about vias on the signal traces?

Thanks again,
-- Georgi

Re: LVDS through connectors
Hi Georgi,

Quoted text here. Click to load it

Avoid them as much as possible (they're major jitter sources), make them
blind vias or counter-bore them to make them as short as possible
(cheaper), and make sure that the signal path goes from the top end of the
metal to the bottom (or the other way around). Leftover metal does nasty
things to the signal.

See

http://www.tycoelectronics.com/products/simulation/files/papers/dc00brdh.pdf

for some great information on this.

Ok, you're not running at 5Gbps, but it never hurts following these rules.

Best regards,


Ben


Re: LVDS through connectors
Quoted text here. Click to load it
them
of the
nasty
http://www.tycoelectronics.com/products/simulation/files/papers/dc00brdh.pdf
Quoted text here. Click to load it
rules.


It all depends what your priorities are -- size, surface mount/through
hole, cost (especially if you want cables), robustness, availability...

If you don't mind using a small surface-mount connector there are
plenty around (Samtec, Mictor etc) which will do this, but they may be
difficult to get in small quantities, and if you need cables they can
be expensive and/or fragile -- and the connectors themselves won't take
a lot of stress.

We've also used standard dual-row 0.1" pitch headers/plugs with no
problem at over 1Gb/s with 100ps risetime signals (from an Agilent
81250 ParBERT); so long as you use a pin arrangement like this

GND GND
D0  D0B
GND GND
D1  D1B
GND GND

the differential impedance is close to 100ohms with negligible
crosstalk or reflections -- there's a virtual ground plane down the
centreline.

Using the back of the PCB for tracking there's also no stub/via problem
with the through-hole versions, if you shrink the internal pads on the
via hole barrel and widen the space to the ground planes you can get
the through hole connection to be about 50ohms single-ended.

Or robust surface-mount versions are also widely available if you want
to keep tracking on the top of the PCB, but you might need to cut away
the ground plane on the layer under the (wide) signal pins to reduce
capacitance and keep the 50ohms sigle-ended impedance.

The connectors are widely available, through-hole (strong, easy to
mount) or robust surface-mount, can be had polarised and/or latching,
and you can easily make up your own cables using standard
small-diameter coax with the screen split into two grounds either side
of the signal.

It might sound unlikely that you can use bog-standard 0.1" headers at
these frequencies, but it works just fine given these precautions (and
of course equalised tracking lengths for the diff pairs).

Ian


Re: LVDS through connectors
Ian,
Good post, thanks.
Syms.



Re: LVDS through connectors
Quoted text here. Click to load it

Ian,

Thanks for the reply. I think this arrangement will also work well with
standard flat cables that plug into the dual-row connectors. The wires
in the cable will be ordered like that:

GND
GND
D0
D0B
GND
GND
D1
D1B
GND
GND

The crosstalk between adjacent LVDS pairs will be reduced by the two
ground wires between them. Have you worked with such a connection? Does
it perform well given that there are now two cheap and non-SI-optimized
connectors at both ends of the cable?

Thanks,
-- Georgi

Re: LVDS through connectors
Hi Georgi

We didn't use ribbon cables like this, because in our application the
connectors were either wired via miniature coax to SMAs (to connect to
the 81250) or used to connect to daughter cards.

So long as the differential impedance of the LVDS pair in the ribbon
cable is close to 100ohms (which it should be) this should be fine, so
long as the cables are short enough that loss isn't an issue (coax is
much lower loss than standard ribbon).

Crosstalk will certainly not be an issue with 2 grounds between the
LVDS pairs.

Cheers

Ian


Re: LVDS through connectors
Quoted text here. Click to load it
Hi James,
Not true either! You've brought out the pedant in me! It's not edge rate,
but rise time. For example, what's the edge rate in a 400kV power line?
Still only 50 or 60 Hz though!
Also, In the context of this thread, I assume you mean bit-rate when you say
frequency. Marc didn't mention frequency anywhere. (And as Glen meant, rise
time and frequency are equivalent anyway.) If that's the case, here's a
counter-example where bit rate does matter. The bus is required to get data
from one end to the other. If the bit-rate was 1Mbps instead of 400Mbps, a
200ps edge rate would give you overshoot/undershoot problems through a
shoddy connector plus lots of EMI, but you'd still have a big enough eye to
recover the data. So, bit-rate is a part of the design exercise.
That said, I understand what you're saying. I'm just being pedantic....
Cheers, Syms.



Re: LVDS through connectors

Quoted text here. Click to load it

I'll mostly agree with you.  We are running three LVDS pairs (200MHz)
plus power over standard 6' shielded Cat5 patch cords with RJ45 jacks
at each end.  We were very careful with the PCB layouts to run the
pairs together, to match the lengths, and to avoid vias.  Works fine.

BTW, we use the common-mode filter termination (see figure 3.3 in the
National Semiconductor LVDS Owner's Manual).

================================

Greg Neff
VP Engineering
*Microsym* Computers Inc.
snipped-for-privacy@guesswhichwordgoeshere.com

Re: LVDS through connectors
Hi Georgi,

For Higher speeds, I would recommend the AMP Mictor connectors.

This document is a useful design guide:

http://www.latticesemi.com/lit/docs/technotes/tn1033.pdf
Regards

Mark Smith
Strategic Marketing
Lattice Semiconductor


Re: LVDS through connectors
Quoted text here. Click to load it

That's great, thanks!

-- Georgi



Site Timeline