Hi,
I am designing the following converter: LVDS -> some processing -> LVDS. Each LVDS Interface has 3 channels and 1 clock channel at about 300 MHz (differential clock rate).
My question is if I should use GLCK pins for the incoming LVDS clock?
Should I also use GLCK pins for the outgoing LVDS clock? I don't think so, because there is no OBUFGDS. Or does it make sense to use GCLK pins for OBUFDS?
Another question is the bank assignment. Should I put the complete Interface (both LVDS) on the same bank? Or better each LVDS on its own bank? Or do banks not matter at all?
regards, Benjamin