Low hierarchy not follow in ChipScope Pro

Hi all, I have ChipScope Pro 7.1. I successfully evlauate all signal of top module my design. Now i want to also evaluate all signals which is instantiate in top module. For this i just add ChipScope on that particular file and add ILA core and finally select signals. But finally when i implement design, synthsiser skip the inserted ILA core. Can any body tell me how i can monitor low lvel signals without porting these in TOP file.

_____ UART TOP______ --------> Successfully Done thr ILA | | UART RX UART TX ---------> How i monitor | | RX_SM TX_SM --------> How i monitor

Best Regards

Reply to
naumanqau
Loading thread data ...

Hi Please select in XST parameters : "Keep Hierarchy - Yes" and restart.

Alexander

" snipped-for-privacy@gmail.com =D0=BF=D0=B8=D1=81=D0=B0=D0=BB(=D0=B0): "

Reply to
Litv

Dear i done with Keep hirarchy "Yes" but again ILA Core of Chip Scope Pro not implement in design. Any other suggesion.

Reply to
naumanqau

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.