I have spent the past few months slowly trying to get a PCI design with Linux 2.6 on the Virtex 4. I have been able to overcome some of the hurdles; however, I am still unable to boot up a working system. If anyone has tried to do this (or has already done this) I would apprecaite any help or suggestions. I can go into more detail as to what I have done and where I am stuck if there is anyone who would be willing to guide me!
Have you verified PCI functionality with low level test apps - ie do a standalone EDK application that executes a PCI scan, make sure you can see the configuration space, do some simple config setup and try to move some data around.
If that's all working, then in Linux the PPC kernel uses more or less mainline PPC PCI handling code - you just need to do have some Xilinx-specific setup to enable the bridge, and you also need to tweak the config_read and _write routines to only do word accesses.
Post on the linuxppc-embedded list to tap into the right channel.
I first downloaded a "hello_pci" standalone application from Xilinx website. I test my PCI-PCI Bridge and South Bridge and read device ID and vendor ID back. Xilinx's application note #945 has inspired me a lot. I did not try to move any data around because I have no idea how to do that. :-)
After that, I implemented Xilinx's board support package including xparameter head file, ml410 early boot files, pci support files, Board initialization file, did board specific setup, and fixed some bugs in its call tree, which took me almost a month.
I have attached my booting message in this mail. As you can see, I am stuck at "[ 11.805382] Freeing unused kernel memory: 100k init" . Usually it's the last step before the kernel starts root file system. I am sure my ramdisk and root file system were both working OK. My naive thought is that the kernel could not register serial port successfully (see time stamp [ 5.965954]). As a result, ttyS0 was not able to run and display messages after starting ramdisk. I would appreciate any help or suggestions on this.
It's also interesting to see my ml410 board respond me with a "ml300" id. My booting message was saying: pci_scan: bus 0, device 8, id 030010ee "10ee" is the vendor id for xilinx while "300" is the device id which I think might represent ml300. Does Xilinx forget to refresh its rom?
I am about to do that :-)
Here is my environment and tools:
-- Xilinx ML410 Rev C
-- Xilinx EDK 9.2i
-- Secret lab Linux v2.6 originally configured as platform Xilinx ML403
ppb_init: dev = 9, id = ac23104c pci_scan: bus 0, device 1, id 545110b9 pci_scan: bus 0, device 2, id 153310b9 pci_scan: bus 0, device 3, id 545710b9 pci_scan: bus 0, device 8, id 030010ee pci_scan: bus 0, device 9, id ac23104c pci_scan: bus 0, device 12, id 710110b9 pci_scan: bus 0, device 15, id 523710b9 sio_init: Device ID = 53 15, Revision = f3. sio_init: LPT1 base = 0x0378, irq = 5. sio_init: COM1 base = 0x03f8, irq = 4. sio_init: COM2 base = 0x02f8, irq = 3. sio_init: KBC irq = 1, PS2 irq = 1. sio_init: Super I/O initialization complete.
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