libero.actel. i need a clock in a non global pin.

Is possible force the assignation of a clock to a pin (non global pin)? (=BFcan i do before synthesize?)

On synthesis the clock is put in a global pin, and after that, on compilation, on layout I don't get assign on non global pin. can anybody help me?

thanks

Reply to
merche
Loading thread data ...

You can assign a signal to a _pin_ when using Designer by including a=20 GCF file which includes a constraint such as:

set_io "100" "my_clock";

However I suspect you're really asking how to specify a global clock=20 buffer for a signal that is not connected to one of the GLB pins?

For that you need to specify the net as a clock in Synplify using an SDC =

file with a constraint such as:

define_clock {n:my_clock} -name {n:my_clock} -freq 10 -clockgroup=20 default_clkgroup_1

This will prevent Synplify from inferring a tree of BFRs on that net,=20 and in turn Designer will then promote the net to using a global buffer=20 to accomodate its high fanout.

Alan

Reply to
Alan Myler

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.