Lattic ECP/EC -- Partial Run-time Reconfiguration??

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Hi,

Anybody can tell me if Lattic ECP/EC FPGA devices support partial
run-time reconfiguration? If yes, is there any related application note
I can refer.

Thanks a lot

Nickel


Re: Lattic ECP/EC -- Partial Run-time Reconfiguration??

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Nickel,

As far as I know EC/ECP does not support partial reconfiguration.
However, there is something that it might be helpful depending on the
application. EC/ECP has an embedded SPI Flash Memory interface. Using
the normal JTAG pins, you can reprogram the SPI Memory through the FPGA
in a background mode (that is while the logic is running from the SRAM
cells). So, the new configuration file can hold the part of the logic
that you want to change. Hence, after toggling the PRGRM pin for a
short time, the SRAM will be configured with the new configuration
file.
In case that configruation time is critical for your application, I
suggest take a look at the new LatticeXP device.
(http://www.latticesemi.com/products/fpga/xp/index.cfm)
The configruation time for a 10K LUT is less than 1ms, and even more
you can hold the value of the I/Os during that time (leave alone I/O).

rgds,

cristian


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