Know any good public FPGA projects to contribute to?

IMHO: There seems to be a dichotomy between embedded and GP computing. GP programming frowns on using global memory whereas on an embedded chip it is usually very fast. If a subroutine is not recursive nor re-entrant, or ev en if it has limited recursion (typical for embedded software) one can layo ut the "stack frame" in global memory, one area for each subroutine (not as memory efficient as a stack).

There are some tricks that make superscaling simple in this situation. Rem ember way back when there were three address computers. This machine takes one memory cycle for each operand and one cycle for the result and fetches the next instruction while doing the data computation. Block RAM is dual ported so two instructions can run side by side, one on each port. They ar e staggered to avoid a conflict over the data ALU and to let the 2nd instru ction use the condition code results from the 1st. There is a version of t he instruction encoding that uses either two 16-bit instructions or one 32- bit instruction per 32-bit word. One could have the compiler to make sure the two 16-bit instructions can be properly executed side by side, insertin g a NOP if necessary. One reason for four stacks is to make quad issue tec hnically possible, again with the help of the compiler.

Jim Brakefield

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This project implements the lower layers of a standard TCP/IP stack based on a free code from University of Queensland: IP stack My first steps to understand the project, after reading the documents are:

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