Keeping Xilinx tool from Optimizing out Debugging signals

There is a signal that I need to trigger Chipscope on it for debugging purposes. However, after synthesis the signal is optimized out since it's not driving anything (of course it will be driving Chipscope block but that happens after synthesis). Searching this group I found some recommend using the KEEP attribute. Is this a recommended practice? Are there any problems with that approach, since I know this is not that actual purpose of the KEEP attribute.

Thank you.

Reply to
M. Hamed
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That is what is recommended, yes,

Austin

Reply to
austin

Thanks. Works as advertised :-)

Reply to
M. Hamed

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