JTAG programming: JAM files versus ISC (IEEE1532) files

Hi all,

We want to implement a JTAG programmer in an Altera Stratix device to program a chain of EPC16 devices. The Stratix device is commanded through a fibre interface connected to a PC (the ONLY possible connection to the PC).

So far, as we understand we have two options, one is to use JAM/STAPL format and the other option is to use isc files (IEEE 1532). In either case, we could instantiate a NIOS to handle the JTAG programming. I wonder if we can get an expert's opinion on which option makes more sense perhaps depending on the quality of the JAM/isc files that Quartus generates and how long it takes to program the part.

Is it true that the programming time is shorter when using isc files? What are the pros and cons of each option?

Thanks, m

Reply to
mandana
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Since I didn't get any answer, I'm posting this again, hopefully someone will shed some light..... Thanks, m

Reply to
mandana

Here's an opinion (emphasis on the last word there):

The world seems to fall into 2 camps.

Altera is fundamentally a STAPL house. They invented the language and are the only strong supporters of it. They have several variations - JAM (the original non-standard flavor), STAPL (the JEDEC standard version) and a variation that is compiled into a proprietary byte code. Altera's support of the STAPL has been tailing off for the past few years but they will help you out if you pester them enough. If your board is only to have Altera devices on it for the foreseeable future that is your best bet. You will find tepid support from other vendors.

1532, on the other hand, is more accepted at Xilinx. The standard is published by the IEEE and there are no proprietary variations of it. Xilinx has a free, source code interpreter for 1532 called JDrive that you can pick up from their web site. Most manufacturers - even Altera - will support you using 1532 if you pester them enough.

The key differences are as follows:

  1. The run time memory requirement for STAPL may be significantly larger than that of 1532
  2. 1532 has separation of data (ISC file) and algorithm (BSDL file) making update a simpler operation and limiting your exposure to silicon changes.
  3. 1532 supports concurrency at configuration time; STAPL must compile it into the STAPL source file

I do not know if 1532 or STAPL is faster in execution. I suspect that may depend on the platform and the device you are targeting. I think that because STAPL has data and algorithm intertwined in the same file, there would be fewer IO operations than 1532 yielding a run time advantage to STAPL. This may be nullified though because of its larger run time memory requirement.

But aga> Hi all,

Reply to
Neil Glenn Jacobson

Thanks for the reply.

I downloaded the Jam Player code, not the greatest code. but there is no document detailing the STAPL format. What I liked about 1532 was the dedicated ISP commands that would provide almost direct access to the flash. But I'm afraid that with STAPL I may have to go through the whole boundary scan chain and I can see how that needs lots of memory.

Thanks, m

Reply to
mandana

Just so you know, I have used both the Jam and JDrive method to program a xilinx platform flash. Programming time is more a function of the device being program then the type of programming file being used. I experienced no great difference between Jam and JDrive

Reply to
David Colson

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