Hi,
I read the application note ?Virtex-5 FPGA Interface to JESD204A Compliant ADC?.
I?m designing a pcb with a JESD204A NXP DAC linked to Spartan-6 GTP Dual tiles.
I try to know If I?m actually going to be able to implement this interface in Spartan-6.
For example, in the application note, the REFCLKOUT is used to feed some FPGA Logic (in Virtex-5) but I can read from UG386 p93(for Spartan-6) that I should not use this output?
In general terms, Is there any important difference between Virtex-5 and Spartan-6 that would prevent me from implementing the JESD204A interface in Spartan-6?
Thanks a lot for any indication that could help,
YH
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