ise project navigator can't dereference edk pcores from XilinxProcessorIPLib

First of all. Thanks for the bus macro advise.

The second problem still remains. After creating a system with base system builder wizard from EDK's XPS and generating its netlist(s), I wanted to join the vhdl-files from the hdl-directory to a new ISE project. Unfortunatelly ISE doesn't know anything about the imported library modules that the "system" modules refere to. These library modules can be found inside a subdirectory of the EDK installation directory (.../edk/hw/XilinxProcessorIPLib/pcores).

How can ISE be made known, where it should look up those "mysterious" ;-) unknown vhdl-modules?

Can I set something like a PATH variable for such librarys?

I'm working under ISE and EDK version 7.

thx & bye

Reply to
L. Schreiber
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"Macro Search Path" under "Translate Properties". (Right click on "Implement Design" and select "Properties" then the "Translate" tab, or right click on "Translate" and select Properties.)

- Brian

Reply to
Brian Drummond

Brian Drummond schrieb:

Hello,

okay, this doesn't seem to work for the repos modules inside the EDK/hw/XilinxProcessorIPLib/pcores. The error occoures before implement design state (translate) in synthesize stage (syntax checking).

XST tells me ERROR: HDLParsers:3317 - file_name.vhd Line xx. Library lib_name cannot be found. For example library proc_sys_reset_v1_00_a.

I think answer record #14027 says, I should add every missing library (from EDK-directory) manually into my ISE project. I 've already tried this. It has worked quite good until I tried to add a source file from another library, which had the same name as one module included before.

I got stuck again.

Any advice?

Reply to
L. Schreiber

For me, XST simply black-boxed the EDK components below the top-level "system.vhd" file and the PAR tools picked them up later. I don't recall using "black-box" attributes; XST simply left them un-instantiated.

However I think what you are doing SHOULD work. Except... it sounds like you have another problem : XST's handling of libraries seems to be consistently broken (at least on 6.1 and 7.1; I haven't tried newer versions). And this is completely independent of EDK; it seems to do this with any libraries.

Which ISE version are you using?

It is perfectly valid in VHDL to have the same entity name in several different libraries, and select a particular one for instantiation in any place with "library/use" clauses, and embedded configuration statements "for ... use " etc.

But ISE simply instantiates the first component it finds with the right name and ignores your explicit bindings (in my experience). Now I ought to have spent a day or so creating a test case, reproducing the error with the test case, packaging the lot up and opening a Webcase with Xilinx, but I was under time pressure and it was quicker for me to simply rename one of the entities and carry on working.

My experience with Webcases is typically, several iterations with the support staff, ending up with "Yes it's a bug". Sometimes with a scheduled fix in the next major release. And a recommendation to use the workaround I came up with in the first place.

- Brian

Reply to
Brian Drummond

Hi,

That's right.

I have to manipulate the system.vhd from the EDK inside my ise project. That's why I would like to do syntax checking. Isn't syntax checking the first step at all one does when working under ise?

I'm working under 7.x. I will try version 8 next days or week. Maybe it will work better. I have got a license for version 8 since today.

I tried a little bit last week and I think I have accidentally worked around. But I'm not sure how. I added the missing library manually and did syntax checking. ISE does some mysterious magic (:-D) and "compiles" the vhdl module file. Then you can delete the library from the project and it still works. Now you are able to add the second library with the eponymous module inside without problems. Ok, that's tricky or dirty?! ;-) I think, this is how it worked last week one late evening. But I will have to try next days again anyway. I had to redesign something. That's why this problem had to wait.

Yes, I know. That's an advantage of name hierarchies. I think it's more like a names conflict in the internal organisation or implementation of ise, that causes the error. It's absolutely ligitimate in vhdl to have eponymous modules as long as they are in different librarys. But ise states some strange error when adding the second module, even when they are included in different libs. I can't remember the words, the ise error popup has used. I can post it, when I'm at this state of redesign again.

thx

Reply to
L. Schreiber

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