Hello there,
I've got a hard-wired asyncrhonous reset coming into GCK on a Spartan XC2S200 device. The reset is used within three different processes in VHDL code. However, beyond Synthesis and Translation, ISE errors during Mapping. Apparently it is trying to control the packing of flip-flops or latches within an I/O cell. Normally, the Mapper packs devices within an I/O cell only if such packing is specified by the design entry method. However, I don't do this intentially. I can't move the reset to a general I/O as it is fixed in hardware. My experience has not been good with GCK's as I/Os beside clock use. I can't change the LOC constraint in the UCF to a different physical location as this is the only reset available. How can I get rid of this error w/o modifying the code? Tnx,
YZ
-- MAPPING ERROR
ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB component: PAD symbol "Rx_Reset" (Pad Signal = Rx_Reset) BUF symbol "Rx_Reset_IBUF" (Output Signal = Rx_Reset_IBUF)
Each of the following constraints specifies an illegal physical site for a component of type IOB: Symbol "Rx_Reset" (LOC=P77) Please correct the constraints accordingly.