Hi,
I am trying create verilog module that can support parameterized instance n ame. I understand that the signal width and other such things can be parame terized. But can we also parameterize the module instance name?
In following code, I am curious if there is any way SomeDynamicInstanceName can be parameterized also? I can try to use system verilog if that can hel p here
My purpose is to be able to reuse the verilog gmon module (generic verilog module) for various types of signals. But for a reason, I need to change t he SomeDynamicInstanceName. I have control of a verilog file where I insta ntiate gmon verilog module so I can pass the parameters.
Prompt response is greatly appreciated.
`timescale 1 ns/100 ps
module gmon #( parameter WIDTH = 32 ) (Clk, Rst, SignalName);
// PCIE MST_BIF input Clk; input Rst; input [WIDTH-1:0] SignalName;
// input [31:0] SignalName_ret
reg [WIDTH-1:0] SignalName_d1; //reg [31:0] SignalName_d2;
always @ (posedge Clk) begin SignalName_d1