IPIF LogiCore?

Hi there,

I'm trying to build a new core that will use a IPIF PLB interface to connect to the PLB. Most of my logic is ready to roll and tested independantly, but when I came to add the IPIF interface I fell over at the first hurdle :(

I'm using ISE 7.1, and I started a new project, and had guessed that the IPIF logic block would be something I could generate with CoreGen, but apparently not. A search of xilinx.com with IPIF related terms didn't present me with a getting started guide.

Any pointers on how I instantiate an IPIF block. My top level will be produced with VHDL (unless I really have to switch to verilog), and I want to use the IPIF on the PLB and use the DMA capabilities.

Cheers,

-- Michael, sure he's missing something obvious here

Hi Michael,

Since you're talking about PLBs and things, I'm guessing that you must be using the EDK somewhere along the line. The best place to look for information about what you're trying to do is in the Embedded System Tools Reference Manual, in the chapter entitled "Create and Import Peripheral Wizard".

The "Wizard" in question is (fortunately) not one of those two-clever-by-half wizards, but more of a does-the-scut-work-for-you sort of guy. You run it once ("create") and answer some questions, and it spits out a VHDL (or Verilog) skeleton, to which you can attach your custom code. Then, you run it again ("import") and it picks up your design and rolls it up into an EDK "pcore" which you can then instantiate in your EDK design.

I'm sure it's possible to achieve all the above manually without the wizard, but I haven't seen any documentation describing that. Give us a shout if you need any more pointers.

Cheers,

-Ben-