I have an FPGA design where the VHDL source code is a deliverable item to the customer. One of the blocks in the FPGA must be protected so that the customer can't see the source and modify it. The device is a Virtex2-Pro.
I could obfuscate the VHDL identifiers, then generate a netlist, but that doesn't seem to be very strong protection. I also have a picoblaze processor in the design, so I'm not sure how well I can obfuscate the block RAM contents. I could swizzle the address/data bits (as the TOCOM
5507VIP cable box did) when hooking up the block rom to picoblaze, then write a script to convert the picoblaze object code to swizzled ROM init files.I heard a rumor (from a Xilinx FAE) that ISE 7 would have some facility for protecting blocks of code in situations such as this, but I haven't been able to find any info on the Xilinx website about this.
Peter Alfke, I know you have the answer :)
TIA
Urb
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