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Interrupts and PPC/opb_intc

I have a hardware core that needs to be able to generate interrupts for all processors in the system (maximum of two PPC's and two MB's). In the core I have a port defined as:

Preemption_Interrupt : out std_logic_vector(0 to C_NUM_CPUS - 1);

The idea is that the number of interrupt lines in dependent on a user generic (C_NUM_CPUS) which can range from 1-4.

Now the opb_intc in the mhs file:

# ######################################################################################### # ## Interrupt Controller for PPC_0 # ######################################################################################### BEGIN opb_intc PARAMETER INSTANCE = opb_intc_0 PARAMETER HW_VER = 1.00.c PARAMETER C_BASEADDR = 0x41200000 PARAMETER C_HIGHADDR = 0x4120ffff PARAMETER C_NUM_INTR_INPUTS = 4 BUS_INTERFACE SOPB = opb PORT Irq = EICC405EXTINPUTIRQ_0 PORT Intr = RS232_Uart_1_Interrupt & opb_central_dma_0_DMA_Interrupt & access_intr & premt_intr END

BEGIN custom_core PORT Preemption_Interrupt = premt_intr END

The problem is that the PORT Intr sees premt_intr (Preemption_Interrupt from above) as a vector and I need to break out only the first index of this vector. Then, for the second PPC I would have a separate opb_intc that needs only the second index of premt_intr and so on.

Is there a way to do this? I would like to keep it very general as it is now. Can I do something like: PORT Preemption_Interrupt(0) = premt_intr_0 PORT Preemption_Interrupt(1) = premt_intr_1 ....

Reply to
santner
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Well, you could send all the interrupts to all processors and have them each ignore the lines they don't care about.

You could use one of those util_bus_split things (probably more than one) and whittle off bits. The existance of this Xilinx block makes me think that generic bus indexing does not work in a MHS file.

You could make a custom module to split up the bits.

--
Ben Jackson AD7GD

http://www.ben.com/
Reply to
Ben Jackson

Couldn't use util_bus_split because I couldn't specify the output signals (out1 and out2 I think) as interrupt signals. Instead just developed simple custom core. Thanks for the suggestions.

Reply to
santner

Couldn't use util_bus_split because I couldn't specify the output signals (out1 and out2 I think) as interrupt signals. Instead just developed simple custom core. Thanks for the suggestions.

Reply to
santner

Hi.

Are you using XPS? Using multiple interrupts from custom hardware (I'm assuming it's custom) is as simple as making each interrupt line a separate port output from the custom hardware. Import your IP to the project (specifying which ports are your interrupt ports), select your interrupt ports in your custom IP in the System Assembly View: Ports filter, and add each interrupt to each opb_intc instance per processor. It has worked for me using one PPC, adding each interrupt line to one opb_intc instance. I haven't tried combining all of the interrupts into one ports and breaking off each line of the port. I think the former way is simpler.

Basically, break out your interrupt lines from the vector in your HDL to be separate ports (instead of Preemption_Interrupt : out std_logic_vector(0 to C_NUM_CPUS - 1), let them be Preemption_Interrupt_0 : out std_logic; ..._1, ..._2, ..._3, etc.), and then connect them separately to each opb_intc instance. Hopefully that works! If you could, please let me know if it does not.

----JD----

Reply to
JD Newcomb

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