HI how would i use internal signals in XPS for microblaze on spartan 3 fpga board.
let me explain my project in opb_emc im using 2 memory banks so im having two Output enable signals but i have only one external pin so i need to AND these two output signals and produce a single output this output will be given to the external signal.
but i cant understand how can we produce a logic for these internal signals?
any ideaz
Put a util_reduced_logic core in the .mhs
Göran
You can make and add an IP core just like you do for other custom things. You just won't connect it to a bus. You still need the same folder structure and files as you would for another core though...mpd, pao, etc.
I have a couple of these "glue logic" cores in our project. Then you can just connect them internally however you want to. It is easier and cleaner than modifying the emc's logic...if you are even allowed to.
Or you can follow Goran's advice and manually add it to the mhs. Either way.
hi thanks a lot man i knew ther has to be a easy way out util_reduced_logic is the way out
thank you
G=F6ran Bilski wrote:
There are two approaches; the util_reduced_logic core is one; for something slightly more complex you can create your own core for the XPS project and add it just like util_reduced_logic. This allows you to keep the entire project in XPS.
But the other approach is to embed the XPS-generated system as a subsystem in an ISE top level project. The XPS tools will generate a "stub" design that simply brings every pin on your subsystem out through I/O buffers to FPGA pins on the top level design.
You can then use this "stub" as a starting point for your own top level design. In this instance you would simply "and" the two signals from the subsystem and connect the result to a single output pin (deleting the unused one).
For a single "and" gate this would not be simpler, but for a large amount of "traditional" logic (e.g. FFT, filters, etc) it is probably easier than creating XPS cores for everything you want to add...
- Brian
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