Interfacing Spartan 3 board to PC parallel port??

Why not just use the RS-232 port?

Because his homework assignment was to use the parallel port.

-a

Perhaps he needs to acchive datarates far above 1MB?

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Perhaps he needs to acchive datarates far above 1MBaud?

--
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Series resistors ( wire between M-F DB25 as a cascade connector ) should be good enough. Add clamp diodes if you like. You only need microsecond region times, and probably do not care about power loss.

-jg

If I remember correctly, I remember reading about connecting 3.3V CMOS configuration output signals to Xilinx 2.5V CMOS inputs and that was OK as long as the current limit (series resistor) limited the current to less than 10 mA. I think that was for Virtex II. I then remembered that the Spartan3 3.3V CMOS inputs are sensitive to overvoltage due to the 0.9 micron technology. There may be issues connecting 5 volt logic to Spartan3 3.3 volt inputs with series resistors. I think I remember someone saying that the IBIS model will tell you what the delta V of the input clamp diode will be at various input currents. Also consider that if the 3.3 V supply is lightly loaded, the 5 volt signals may have a sneak path through the assumed input clamp diodes and raise the 3.3 volt power supply above 3.3 volts.

jg: Were the input clamp diodes to address the 0.9 micron issue, or the possible lack of an intrinsic input protection diode?

- Newman

oops, it is not 0.9 micron but 90 nanometers.

Shailesh: You might also double check to see that the parallel port accepts TTL level inputs and not regular 5 Volt HC input levels.

-Newman

I have to stick to parallel port!!!

@newman, about connecting 3.3V to 5v parallel port(vice versa), can I use some form of voltage dividers??? I need a configuration which is bi-directional..

This is very basic, remember the old masters;

Ohm and Thevenin

add

FPGA datasheet EPP/ECP specification

think...

yes, but keep in mind a parallel port might use 3.3V output, so design it so it will work on 3.3V and 5V PPorts.

-jg

The parallel port uses TTL levels. You must accept anything above 2.0V as high, and anything below 0.8V as low.

Many parallel ports get very slow rise times above 1.6V, therefore the lower the threshold voltage the better. Using 2.5V CMOS IO on the FPGA with a series resistor to limit the 5V current should work fine with a threshold of 1.25V

3.3V CMOS IO gets you a threshold of 1.65V where the signals are dangerously flat allready. In that case you should add a schmitt trigger. You can build a schmitt trigger by using two FPGA pins per input. A resistor between the two pins and a resistor between one pin and the input allows you to feed back the received value to the input.

Kolja Sulimma