Interfacing a circuit in an FPGA to a PC

If you have an interest in exchanging data between circuitry in an FPGA and= a PC, I have written a simple GUI that demonstrates transfers at full USB2= rates to and from an FPGA interfaced with an FTDI FT2232H USB2 interface c= hip (i.e. the FTDI Morph-IC-II).

There is a free (binary only) download :=20

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, or source code is available for both personal and commercial uses : i.e. (Altera Quartus II v11.1sp2 archive) plus script source plus GUI binary or= source.

There is a help page at :

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ace_to_PC/help.html and a YouTube video putting this code through its paces at :
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These demonstrate a fast way of getting PC access to firmware circuitry in = a Field Programmable Gate Array (FPGA). Pre-written VHDL firmware and array-based software facilitate interfacing a= PC to the FPGA over the USB, and gives transparent access to multiple bank= s of sub-modules and instrument functions in the FPGA at full USB2 rates of= 480 Mbit/s (60 MBytes/s).

Each sub-module has an independent block of up to 256 USB interface registe= rs, to configure the sub-instrument and for bi-directional data transfer. T= his Lab-Tools code forms the skeleton into which the sub-modules / instrume= nts may be slotted, in a consistent manner.

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Dr. Beau Webber
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nd a PC, I have written a simple GUI that demonstrates transfers at full US= B2 rates to and from an FPGA interfaced with an FTDI FT2232H USB2 interface= chip (i.e. the FTDI Morph-IC-II).

ip ,

or source. I have slightly updated the code to Version 0.95 - it should now have some = slight functionality even if you do not have a Morph-IC-II FPGA module plug= ged in.=20 Note you will first need to download and install the APLX Support Library f= rom MicroApl :

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. If you run= Norton, it will probably complain that the .exe file is infected - the fil= e is not infected, but it is a powerful piece of code, as it has to access = a number of .dlls to program and interface to the FPGA.

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beau

and a PC, I have written a simple GUI that demonstrates transfers at full = USB2 rates to and from an FPGA .....

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Now : "The Symantec Insight Dispute team has reviewed your recent submissio= n to the Insight Dispute Submission form Webpage form "FPGA_interface_demo_=

2012-05-13_TF." In light of further investigation and analysis Symantec is = happy to remove this detection from within its products."
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Dr. Beau Webber

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